Use this tool to quickly refine your search by selecting a topic and document type by keyword only. Learn more
Have an Intelrepresentative contact you.
The Mobile Intel® GM45, Intel® GS45 and Intel® GL40 Express Chipsets are optimized for rapid deployment and minimal development risk. Each chipset offers slightly different features, and is selectively validated with the Intel® Core™2 Duo Processors T9400Δ, SL9400Δ and SP9300Δ, Intel® Celeron® M Processor 722Δ or Intel® Celeron® Processor 575Δ. Together these chipsets and processors provide a broad range of high-performance, thermally-sensitive embedded solutions for retail and transaction terminals, small-to-medium business and enterprise communications, storage, gaming, digital security and surveillance, medical imaging and industrial automation applications.
Chipsets include an improved integrated graphics engine, DDR2 or DDR3 system memory controller and support for Intel® Active Management Technology, Intel® Trusted Execution Technology and Intel® Matrix Storage Technology. The GS45 provides the same feature set and functionality as the GM45, in a smaller package (22mm x 22mm).
Intel® 82574L and 82574IT Gigabit Ethernet Controllers Product Brief
Version: 001 : June 2008
Product brief for the Intel® Celeron® M Processor 575.
Version: 006 : May 2009
Product brief for the Intel® Celeron® M Processor 722.
Version: 004 : June 2009
Product brief for the Intel® Core™2 Duo Processors for embedded computing.
Version: 012 : March 2009
Suppliers of support components have developed products for system designs based on the Intel® Core™2 Duo processor family in the 775-land LGA package.
This document provides a context for using the features for manufacturability and debug implemented on Intel® processors and chipsets.
Version: 001 : October 2007
The Introduction to Via-In-Pad (VIP) Board Design application note covers the differences between high density interconnect and VIP when designing your board.
Version: 001 : November 2008
This note describes the hardware and register changes required to enable the PCI Express* Graphics Port on the Mobile Intel® GM45 and GS45 Express Chipsets to operate in x2, x4 and x8 widths for non-graphics devices (general purpose I/O) in addition to the x1 width already supported, for embedded applications.
File Type/Size: PDF 175KB
Version: 1.0 : July 2008
An increase in the speed and frequency of a design combined with a need to reduce cost has created a challenge in defining an acceptable stack-up to meet the needs of high-speed designs.
Version: December 2008
This paper discusses the software methods used to access PCI Express* registers, including the formula used to calculate the memory locations needed to access a specific register.
This paper covers what it takes to set up the IA-32 architecture and potential usage models for asymmetric multiprocessing.
Version: January 2009
This paper examines storage solutions, from USB flash drives to high capacity disk drives, and discusses the trade-offs in finding the right solutions for an embedded application.
DDR is one of the challenging interfaces for a signal integrity engineer. This paper outlines an approach to divide the task, with an example for each step from the DDR2 interface.
Here are recommendations for engineers who are designing embedded systems with the minimum number of power rails, including power and reset sequencing for standby and main rails.
This paper provides insights on how high speed signals behave on a board, the role played by inductors, resistors and capacitors and available design tools.
Since memory latency is an important factor of overall performance, it is important to know what tool to use in order to gather this information.
I²C bus protocols can differ slightly from Intel® Controller Hub (ICH) SMBus protocols.This paper provides a full description of the details of each SMBus cycle supported by the ICH.
Information on the NEXUS automotive JTAG, the Intel XDP and ITP and available debuggers.
This paper explores design paradigms for data plane packet processing on multi-core Intel architecture systems and their impact on data structure design and synchronization primitives.
MSI delivery and servicing removes the two big limitations associated with Intel® architecture, the limited number of interrupts and unnecessarily high interrupt latencies.
Based on real-world applications, these tips will help programmers migrating to multi-core systems avoid some of the pitfalls that can come with the new parallel paradigm.
Intel delivers platform design guidelines with validated platforms. This document details the signal integrity impacts from every deviation and describes solutions to overcome them.
This paper uses PiAutoSim*, a bench-top simulator, to show how upgrading the hardware and software development environment of an embedded product enables significant performance improvements.
This whitepaper looks at how well the current family of Intel® low power processors perform against PowerPC* processors.
Ensuring sufficient hardware level I/O capabilities for embedded designs is critical. This paper outlines the PCIe hardware level benchmarking used by Intel to collect I/O performance data.
L3 forwarding measures the Intel® architecture core capability in processing IP packets without any loss. This paper explains L3 forwarding measurement and optimization techniques.
Datasheet for the Intel® 82801IB ICH9, 82801IR ICH9R, 82801IH ICH9DH, 82801IO ICH9DO, 82801IBM ICH9M and 82801IEM ICH9M-E, and ICH9M-SFF ICH9-I/O controller hubs.
Version: 004 : August 2008
This is the main processor component specification document, including electrical, mechanical and thermal specifications.
File Type/Size: PDF 1,296KB
Version: 1.0 : May 2008
Volume 1 external design specification for the Mobile Intel® 4 Series Express Chipset Family.
File Type/Size: PDF 2,099KB
Version: 2.3 : November 2008
Volume 2 external design specification for the Mobile Intel® 4 Series Express Chipset Family.
File Type/Size: PDF 1,910KB
Intel® 82574 GbE Controller Family Datasheet
Version: 017/Rev 2.6 : August 2009
Intel® Core™2 Duo Processors on 45nm Process datasheet.
Version: 004 : March 2009
An Intel Mobile Voltage Positioning (Intel® MVP) -6 voltage regulator (VR) is used to regulate power to the core of Intel® Mobile processors. This document also contains Intel MVP-6+ features required for the latest mobile and ultra mobile device platforms.
File Type/Size: PDF 2,895KB
Version: 1.5 : February 2009
Datasheet for the Mobile Intel® 4 Series Express chipset family (GMCH).
Version: 006 : June 2009
Specification update for the Intel® 4 Series Express Chipset.
Version: 010 : September 2009
Intel® 82574 GbE Controller Family Specification Update
Version: 2.7 : August 2009
Intel® I/O Controller Hub 9 (ICH9) Family Specification Update.
Version: 018 : August 2009
The addendum provides additional information not previously released in the design guide including updates, changes and clarifications to be used in conjunction with the parent design guide.
File Type/Size: PDF 649KB
Version: 1.0 : February 2008
The design guide contains information supporting the use and implementation of a small form factor embedded design.
File Type/Size: PDF 12,491KB
Version: 2.1 : December 2008
This design guide contains information supporting the use and implementation of a reference design, with information on board layout and system design.
File Type/Size: PDF 11,631KB
Version: 2.3 : February 2009
Layout checklist for the Intel® Core™2 Duo Mobile Processor Built on 45nm Process Technology, Mobile Intel® 45 Express Chipset and 82801IBM/IEM I/O Controller Hub.
File Type/Size: PDF 1,760KB
Version: 1.5 : January 2008
Platform layout checklist for Intel® Core™ 2 Duo Mobile Processor, Mobile Intel&retg; 45 Express Chipset (Montevina) small form factor (SFF).
File Type/Size: PDF 1,945KB
Version: 1.0 : January 2008
Schematics checklist for Intel® Core™2 Duo Mobile Processor, Mobile Intel® 45 Express Chipset and 82801 IBM I/O Controller Hub (82801IBM I/O Controller Hub (ICH9M)).
File Type/Size: ZIP 1,007KB
Version: 2.2 : October 2008
Small form factor (SFF) platform schematics design checklist for the Intel® Core™2 Duo processor T9400 and Mobile Intel® GM45 Express Chipsets.
File Type/Size: ZIP 958KB
Version: 2.0 : September 2008
The Trace Length Calculator ensures trace lengths meet recommendations in the associated platform design guide.
File Type/Size: ZIP 2,810KB
Version: 1.5 : July 2008
File Type/Size: ZIP 297KB
Get your software up and running using boards and development kits from Intel and third-party vendors.
User's manual for the Intel® Core™2 Duo Processor and Intel® GM45 Express Chipset (with DDR2 System Memory) development kit.
Version: 001 : July 2008
User's manual for the Intel® Core™2 Duo Processor and Intel® GM45 Express Chipset (with DDR3 System Memory) development kit.
Version: 001 : September 2008
VirtuaLab* from TechOnline* provides online access to a real development board that enables you to run and evaluate application code.
Purchase Intel® embedded products from Intel® Authorized Industrial Distributors.
If you already have an account set up with Intel, contact your CBA for order placement. If you are not currently set up with Intel, visit the “Where to Buy” section of the EDC.
Intel® 82574 GbE Controller Family Driver Download
This presentation covers the platform customer reference board, platform design guidelines, platform software, platform technologies and the Intel® Early Access Program.
File Type/Size: PDF 4,137KB
Version: 2.3 : October 2008
Shahram Mehraban talks about the Intel®Core™2 Duo processor T9400 and Intel®GM45 Express Chipset. Duration: 2:37.
Overview presentation of the platform based on the Intel® Core™2 Duo Processor, Mobile Intel® 4 Series Express Chipset ICH9M I/O controller hub and Intel® GbE LAN controller.
File Type/Size: PDF 1,874KB
Version: 4.0 : November 2007
Intel® Core™2 Duo Processor and Mobile Intel® 4 Series Express Chipset development kit.
Version: 002 : September 2008
Product brief for the Mobile Intel® GM45, Intel GS45, and Intel GL40 Express Chipsets for embedded computing.
Version: 005 : June 2009
The customer reference board file is a layout file (including schematics and Allegro formats) for targeted designs.
File Type/Size: ZIP 10,910KB
Version: 1.0
File Type/Size: ZIP 10,958KB
Version: 1.0 : September 2007
File Type/Size: ZIP 9,530KB
Customer reference board for the Intel® Core™2 Duo Small Form Factor (SFF) Processor, Mobile Intel® GM45 Express SFF and Intel® ICH9M SFF Chipset.
File Type/Size: PDF 2,119KB
Version: 1.0 : November 2007
The customer reference board schematics contains the schematics for the product-specific customer reference board, and guides the user in the use of the related customer reference board.
File Type/Size: PDF 2,071KB
Schematic for the Mobile Intel® Core™2 Duo Processor, Mobile Intel® GM45 Express and ICH9M Chipset (DDR2) customer reference board (standard form factor components, DDR2 Memory).
File Type/Size: PDF 1,943KB
Version: 1.0 : August 2007
OrCAD schematic file for the customer reference Board for Intel® Core™2 Duo Small Form Factor (SFF) Processor, Mobile Intel® GM45 Express SFF and Intel® ICH9M SFF Chipset.
File Type/Size: ZIP 2,272KB
Version: 0.7 : October 2007
OrCAD schematic file for the Mobile Intel® Core™2 Duo Processor, Mobile Intel® GM45 Express and ICH9M Chipset (DDR2) customer reference board.
File Type/Size: ZIP 1,637KB
Version: 1.0 : October 2007
OrCAD schematic for the Mobile Intel® Core™2 Duo Processor, Mobile Intel® GM45 Express and ICH9M Chipset (DDR3) customer reference board.
File Type/Size: ZIP 1,661KB
Schematic .pdf for the Mobile Intel® Core™2 Duo Processor, Mobile Intel® GM45 Express and ICH9M Chipset (DDR3) customer reference board.
The input/output (I/O) buffer information specification model defines a buffer's characteristics for all of the I/O pins of the device.
File Type/Size: ZIP 5,585KB
Version: 1.6 : June 2007
File Type/Size: ZIP 1,333KB
File Type/Size: ZIP 146KB
Version: 0.5 : July 2007
The IBIS models are presented in an industry-standard format that lets you run your own simulations.
File Type/Size: ZIP 186KB
Version: 0.7 : June 2007
File Type/Size: ZIP 918KB
Version: 1.5 : December 2007
File Type/Size: ZIP 3,485KB
Version: 1.0 : December 2007
Ballout, signal and mechanical package for the Intel® 828011BM ICH9M Controller Hub.
File Type/Size: ZIP 386KB
Version: 1.0 : August 2006
Package pinout and mechanical data for the Intel® Core™2 Duo processor.
File Type/Size: ZIP 646KB
Version: 1.0 : January 2007
Thermal models for the Intel® Core™2 Duo processor.
File Type/Size: application/zip 39KB
Processor for embedded applications thermal design guide for the Intel® Core™2 Duo processors on 45nm process.
Ballout, signal and mechanical package for the Mobile Intel® 4 Series Express Chipset Family.
File Type/Size: ZIP 398KB
Version: 1.3 : August 2008
Intel's power profiling kit can accurately measure a platform's total AC, DC and component level power consumption while running standard applications or benchmarks.
This document defines thermal cooling: passive, active and fanless thermal solutions and their difference via the three modes of heat transfer—conduction, convection and radiation.
Intel® Embedded Graphics Drivers (IEGD) are a suite of multi-platform graphics drivers designed to meet the requirements of embedded applications.
Intel provides development drivers for Intel® Integrated Graphics to the open source community.
Version: November 2008
Read and accept the software agreement to download source code from N.A. Software. AltiVec* SIMD macros translator software is provided ‘as is.' Intel does not provide support. Please contact N.A. Software for support.
This paper explores technical issues around building, debugging and deploying embedded firmware on an Intel® architecture system.
Presentation introduces N.A. Software AltiVec* SIMD macros translator software. Software is provided ‘as is.’ Intel does not provide support.
File Type/Size: PDF 865KB
Version: April 2009
Information and demos on the Intel® Compiler, Intel® VTune™ Performance Analyzer, Intel® Thread Checker and Intel® Thread Profiler.
OpenMP* is a set of pragmas, function calls and environment variables that simplify the creation, synchronization and deletion of threads in your applications.
Version: September 2007
AMIBIOS8* is a well supported and stable BIOS product adopted by all computing market segments.
AMI* Aptio provides a firmware solution based on EFI, UEFI and Intel® Platform Innovation Framework for EFI specifications.
This download site contains Intel® Embedded Graphics Drivers for most widely used operating systems.
This paper explains how I/O address aliasing works with respect to these registers for all ICH modes and provides exact programming instructions and sample code.
Browse dozens of technical white papers on Intel® Compilers, the Intel® VTune™ Analyzer, Intel® Performance Libraries, Threading Analysis Tools, Cluster Tools, and XML products.
This presentation from QNX covers Intel's breadth of multi-core solutions and discusses issues developers face when moving to multi-core, with examples.
File Type/Size: PDF 1,534KB
Version: 4 : February 2009
Intel® 82574L/IT Gigabit Ethernet Controllers are ideal for GbE implementations on small form-factor embedded designs as well as client and server LAN on motherboard (LOM) configurations. This 9mm x 9mm, 64-pin, QFN (Quad Flatpack No-lead) silicon package provides a 40 percent reduction in total footprint over the previous generation. Intel 82574L/IT Gigabit Ethernet Controllers consume less than 710mW in GbE mode and less than 300mW in 10/100 mode.
Online hardware & software product evaluation.
Get development tools on a 30-day loan basis.
Videos, online classes & eLearning by Mindshare*.
Terms for embedded developers with definitions from Intel.
Intel® Embedded Alliance is a trusted supply line of Intel-based products and services where member companies offer solutions to speed development, design and reduce costs.