Intel® Core™ Ultra Processors for H-series and U-series Platforms IOE-P I/O Registers
| ID | Date | Version | Classification |
|---|---|---|---|
| 795262 | 12/14/2023 | 001 | Public |
ACS Control Register (ACSCTLR) – Offset 226
This is the ACS Control Register registers. Refer description for each individual field below for more details of the register functionality.
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 15:7 | 0h | RO | Reserved (RSVD_M) Reserved. |
| 6 | 0h | RO | ACS Direct Translated P2P Enable (TE) ACS Direct Translated P2P is not supported. |
| 5 | 0h | RO | ACS P2P Egress Control Enable (EE) ACS P2P Egress Control is not supported. |
| 4 | 0h | RW | ACS Upstream Forwarding Enable (UE) ACS Upstream Forwarding. |
| 3 | 0h | RW | ACS P2P Completion Redirect Enable (CE) Determines when the component redirects peer-to-peer Completions upstream - applicable only to Read Completions whose Relaxed Ordering Attribute is clear. |
| 2 | 0h | RW | ACS P2P Request Redirect Enable (RE) Determines when the component redirects peer-to-peer memory Requests targeting another peer port upstream. |
| 1 | 0h | RW | ACS Translation Blocking Enable (BE) When set, the component blocks all upstream Memory Requests whose Address Translation (AT) field is not set to the default value. |
| 0 | 0h | RW | ACS Source Validation Enable (VE) When set, the component validates the Bus Number from the Requester ID of upstream Requests against the secondary / subordinate Bus Numbers. |