| SRF1 | No Fix | Intel® VT-d Remapping Hardware Does Not Perform Reserved(0) Check on PGSNP Field of Scalable-Mode PASID Table Entry |
| SRF2 | No Fix | Remapping Hardware May Set Access/Dirty Bits in a First-stage Page-table Entry |
| SRF3 | No Fix | Machine Check Bank 4 UCNA Errors May Not be Signaled |
| SRF4 | No Fix | Platform May Hang if System Software Sends a Page Group Response or DevTLB Invalidation to Non-existent Requester ID |
| SRF5 | No Fix | Remapping Hardware Implements Bits [31:16] of the three Event Data Registers (VTDBAR offsets 0x3C, 0xA4, and 0xE4) as Read-Writable |
| SRF6 | No Fix | Performance Monitoring Event Branch Instruction Retired Will Not Count CALLs to Next Sequential Instruction |
| SRF7 | No Fix | Performance Monitoring Event Branch Instruction Retired Will Overcount on Certain Types of Branch and Complex Instructions |
| SRF8 | No Fix | Remapping Hardware May Encounter Incorrect Error Code in Invalidation Queue Error Record Register |
| SRF9 | No Fix | Processor Trace May Generate PSB Packets Too Infrequently |
| SRF10 | No Fix | Unsynchronized Cross-Modifying Code Operations Can Cause Unexpected Instruction Execution Results |
| SRF11 | No Fix | Address of Poisoned Data Line May Be Incorrectly Reported |
| SRF12 | No Fix | Locked Page Split Access May Not Be Detected by UC-lock Disable if Split-lock Disable is Not Used |
| SRF13 | No Fix | Intel® QuickAssist Technology Accelerator May Violate ATS Invalidation Completion Ordering |
| SRF14 | No Fix | Intel® QuickAssist Technology Accelerator Device May Not Invalidate PASID Supervisor-Privilege Translations |
| SRF15 | No Fix | RTTO May Occur at Lower Link Speed And Reduce Link Width |
| SRF16 | No Fix | PCIe Root Port May Fail to Set The RICFM Bit |
| SRF17 | No Fix | Intel® IAA Drop Initial Bits Field in AECS May Not Clear When Drop Initial Bits field is 8 Times Source1 Size |
| SRF18 | No Fix | Intel IAA/Intel DSA May Not Report Interrupt PASID Check Failure Error |
| SRF19 | No Fix | The Processor May Drop Noncompliant Posted Peer-to-Peer Transactions |
| SRF20 | No Fix | Unexpected Rollover in MBM Counters |
| SRF21 | No Fix | Remapping Hardware May Not Generate a Page Request Group Response Message While Operating in Legacy Mode or Abort DMA Mode |
| SRF22 | Fixed | Remapping Hardware May Abort ZLR to Second-Stage Write Only Pages |
| SRF23 | No Fix | Remapping Hardware Does Not Perform Reserved (0) Check in Page Response Descriptor |
| SRF24 | No Fix | I/O And Complex Operations May Hang in The Presence of Lines Marked Poisoned |
| SRF25 | No Fix | CHA UCNA Errors May Be Incorrectly Controlled by MC7_CTL Enable Bits |
| SRF26 | No Fix | Errors May Occur During TOR CrashDump |
| SRF27 | No Fix | TOR_TIMEOUT May Occur Due to RID Values Outside Range Limit |
| SRF28 | No Fix | DDR5 9x4 DIMMs ECS Data May Be Reported Incorrectly |
| SRF29 | No Fix | RETRY_RD_ERR_LOG_MISC.DDR5_9x4_half_device Bit May Be Incorrect |
| SRF30 | No Fix | Intel DSA Memory Write with Incorrect Parity May Result in a System Crash |
| SRF31 | No Fix | Intel IAA Expand Operation With PRLE Format Input May Return an Error |
| SRF32 | No Fix | Processor Trace May Not Generate a CYC Packet Before MODE.EXEC Packets |
| SRF33 | No Fix | APPP Error May Be Logged Incorrectly in Machine Check Status Register ADDRV |
| SRF34 | No Fix | Intel DSA Does Not Report IDPT Entry in SWERROR or Event Log |
| SRF35 | No Fix | UBOXERRMISC_CFG Registers Do Not Log Errors |
| SRF36 | No Fix | Intel DSA and Intel IAA Devices May Cause a Machine Check |
| SRF37 | No Fix | Intel DSA and Intel IAA Devices May Cause Invalid Translation Caching |
| SRF38 | No Fix | S and AR Bits of MCi_STATUS Registers Unexpectedly Cleared by UCNA or CE |
| SRF39 | No Fix | Completion Timeout When Using Link IDE And Selective IDE |
| SRF40 | No Fix | Error Overflow Indication is Not Getting Set Properly When Back to Back Errors Occur |
| SRF41 | No Fix | Non Canonical Fault May Be Signaled on Access That Wraps Address Space When LAM is Enabled |
| SRF42 | No Fix | Intel RDT Memory Bandwidth Monitor (MBM) May Overcount Memory Bandwidth Measurements |
| SRF43 | No Fix | Intel RDT Memory Bandwidth Allocation (MBA) Cannot Throttle to Minimum Bandwidth |
| SRF44 | No Fix | Mirrored 128b ECC Mode May Not Log DRAM Address With Poison |
| SRF45 | No Fix | Cache Level Wrongly Reported in Machine Check Banks |
| SRF46 | No Fix | System Hang When Page Request Message Issued From Discrete Device |
| SRF47 | No Fix | PLR and PEM PCS_PSTATE Not Asserted or Incremented |
| SRF48 | Fixed | Some PECI Wire Commands May Not be Serviced |
| SRF49 | No Fix | Unable to Access 32-bit Address MMIO Registers Out of Band |
| SRF50 | No Fix | PCIe TLP May be Lost After Link Down Event |
| SRF51 | Fixed | Invalid BMC Frame Data During Reset Cycling |
| SRF52 | Fixed | Unpredictable System Behavior May Occur When C6 or Deeper Sleep States Are Used |
| SRF53 | Fixed | A Core May Hang When Entering or Exiting C6 or Deeper Sleep States |
| SRF54 | No Fix | Reserved(0) Check For a PASID Table Entry May Not Happen For a DMA Request |
| SRF55 | No Fix | Remapping Hardware With Major Version Number 6 Incorrectly Advertises The ESRTPS Support |
| SRF56 | No Fix | Remapping Hardware Will Not Report The PASID Value For RTA.2 Faults in Modes Other Than Scalable Mode |
| SRF57 | No Fix | Remapping Hardware Does Not Perform a Reserved(0) Check in Interrupt Remap Table Entry |
| SRF58 | No Fix | Intel IAA Decompression Logic May Return Incorrect Values in Completion Record When All Source 1 Data is Dropped |
| SRF59 | Fixed | CPUID Returns Invalid Level Type |
| SRF60 | No Fix | Unexpected Recoveries With ASPM L1 in CXL Endpoint |
| SRF61 | No Fix | PCIe Infinite Recovery Loop During Link Equalization |
| SRF62 | No Fix | Incorrect B2CMI MCi_STATUS_SHADOW.CORRCOUNT Value |
| SRF63 | Fixed | Incorrect RAPL PPL1 Limit |
| SRF64 | No Fix | Incorrect Values For CHA ALL0 And CHA ALL1 |
| SRF65 | Fixed | Boot Failure During BIOS Update With Missing CHA RTID Table |
| SRF66 | No Fix | CXL Mode Incorrectly Identifies ASPM L1 Aborts |
| SRF67 | Fixed | System Hang During Sideband and Traffic To B2CXL |
| SRF68 | No Fix | SYS_RESET_N Trigger May Lead to MCA_GPSB_TIMEOUT |
| SRF69 | Fixed | Intel® OOBMSM RDIAMSREX Command Unable to Access MSRs Under IERR Conditions |
| SRF70 | No Fix | Performance Monitoring Event For Memory Bound Stalls May Undercount |
| SRF71 | No Fix | PCIe Root Port May Not Reduce Link Width |
| SRF72 | No Fix | PMON Unit Control Unfreeze May Cause COUNTERVALUE Registers to Overcount |