Firmware Interface Table

BIOS Specification October 2022 Revision 1.4

ID 599500
Date 10/01/2022
Intel Confidential
Document Table of Contents

Firmware Interface Table Introduction

This document provides a high-level overview of the Firmware Interface Table.

A Firmware Interface Table (FIT) is a data structure inside BIOS flash and consists of multiple entries. Each entry defines the starting address and attributes of different components in the BIOS. FIT resides in the BIOS Flash area and is located by a FIT pointer at physical address (4GB - 40h), refer to Figure below. The FIT is generated at build time, based on the size and location of the firmware components.

The CPU processes the FIT before executing the first BIOS instruction located at the reset vector (0FFFFFFF0h). If a microcode update for the BSP is pointed by a FIT type 1 entry, it is loaded before executing the BIOS code at the reset vector and applied to all threads within the package.

Refer to the CPU BIOS specification for model specific Microcode Update Loading guidance.

The FIT boot is a method the processors use to establish a root of trust for the BIOS. If a valid type 2 entry is found, then that startup ACM is executed.

For detailed information regarding the ACM, refer to the Intel® Trusted Execution Technology BIOS Specification BIOS Writer's Guide.