Functional Description

The PCH integrates a Gigabit Ethernet (GbE) controller. The integrated GbE controller is compatible with the Intel^® Ethernet Connection I219. The integrated GbE controller provides two interfaces for 10/100/1000 Mbps and manageability operation:

• Data link based on PCI Express* – A high-speed interface that uses PCIe* electrical signaling at half speed and custom logical protocol for active state operation mode.
• System Management Link (SMLink0)—A low speed connection for low power state mode for manageability communication only. The frequency of this connection can be configured to one of three different speeds (100 kHz, 400 kHz or 1 MHz).

The Intel^® Ethernet Connection I219 only runs at a speed of 1250 Mbps, which is 1/2 of the 2.5 GB/s PCI Express* frequency. Each of the PCI Express* root ports in the PCH have the ability to run at the 1250-Mbps rate. There is no need to implement a mechanism to detect that the Platform LAN Device is connected. The port configuration (if any), attached to the Platform LAN Device, is pre-loaded from the NVM. The selected port adjusts the transmitter to run at the 1250-Mbps rate and does not need to be PCI Express* compliant.

The integrated GbE controller operates at full-duplex at all supported speeds or half-duplex at 10/100 Mbps. It also adheres to the IEEE 802.3x Flow Control Specification.

The integrated GbE controller provides a system interface using a PCI Express* function. A full memory-mapped or I/O-mapped interface is provided to the software, along with DMA mechanisms for high performance data transfer.

The integrated GbE controller features are:

• Network Features
  • Compliant with the 1 GB/s Ethernet 802.3, 802.3u, 802.3ab specifications
  • Multi-speed operation: 10/100/1000 Mbps
  • Full-duplex operation at 10/100/1000 Mbps: Half-duplex at 10/100 Mbps
  • Flow control support compliant with the 802.3X specification
  • VLAN support compliant with the 802.3q specification
  • MAC address filters: perfect match unicast filters; multicast hash filtering, broadcast filter and promiscuous mode
  • PCI Express*/SMLink interface to GbE PHYs
• Host Interface Features
  • 64-bit address master support for systems using more than 4 GB of physical memory
  • Programmable host memory receive buffers (256 bytes to 16 KB)
  • Intelligent interrupt generation features to enhance driver performance
  • Descriptor ring management hardware for transmit and receive
  • Software controlled reset (resets everything except the configuration space)
  • Message Signaled Interrupts
• Performance Features
  • Configurable receive and transmit data FIFO, programmable in 1 KB increments
  • TCP segmentation off loading features
  • Fragmented UDP checksum off load for packet reassembly
  • IPv4 and IPv6 checksum off load support (receive, transmit, and large send)
  • Split header support to eliminate payload copy from user space to host space
  • Receive Side Scaling (RSS) with two hardware receive queues
  • Supports 9018 bytes of jumbo packets
  • Packet buffer size 32 KB
  • TimeSync off load compliant with 802.1as specification
  • Platform time synchronization
• Power Management Features
  • Magic Packet* wake-up enable with unique MAC address
  • ACPI register set and power down functionality supporting D0 and D3 states
  • Full wake up support (APM, ACPI)
  • MAC power down at Sx, DM-Off with and without WoL
  • Auto connect battery saver at S0 no link and Sx no link
  • Energy Efficient Ethernet (EEE) support
  • Latency Tolerance Reporting (LTR)
  • ARP and ND proxy support through LAN Connected Device proxy
  • Wake on LAN (WoL) from Deep Sx
  • Windows* InstantGo* Support