Intel® 500 Series Chipset Family On-Package PCH Datasheet Volume 1

Datasheet

ID 631119
Date 13/07/2021 00:00:00
Public Content
Document Table of Contents

I/O Signal Planes and States

Signal Name

Power Plane

During Reset1

Immediately after Reset1

S4/S5

Deep Sx

I2C[5:0]_​SDA

Primary

Undriven

Undriven

Undriven

OFF

I2C[5:0]_​SCL

Primary

Undriven

Undriven

Undriven

OFF

Notes:
  1. Reset reference for primary well pins is RSMRST#.