Intel® 500 Series Chipset Family On-Package PCH Datasheet Volume 1

Datasheet

ID 631119
Date 13/07/2021 00:00:00
Public Content
Document Table of Contents

Signal Description

Name

Type

Description

PCIE1_​RXN / USB31_​1_​RXN

PCIE1_​RXP / USB31_​1_​RXP

I

USB 3.2 Differential Receive Pair 1: These are USB 3.2-based high-speed differential signals for Port 1. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE1_​TXN / USB31_​1_​TXN

PCIE1_​TXP / USB31_​1_​TXP

O

USB 3.2 Differential Transmit Pair 1: These are USB 3.2-based high-speed differential signals for Port 1. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE2_​RXN / USB31_​2_​RXN

PCIE2_​RXP / USB31_​2_​RXP

I

USB 3.2 Differential Receive Pair 2: These are USB 3.2-based high-speed differential signals for Port 2. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE2_​TXN / USB31_​2_​TXN

PCIE2_​TXP / USB31_​2_​TXP

O

USB 3.2 Differential Transmit Pair 2: These are USB 3.2-based high-speed differential signals for Port 2. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE3_​RXN / USB31_​3_​RXN

PCIE3_​RXP / USB31_​3_​RXP

I

USB 3.2 Differential Receive Pair 3: These are USB 3.2-based high-speed differential signals for Port 3. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE3_​TXN / USB31_​3_​TXN

PCIE3_​TXP / USB31_​3_​TXP

O

USB 3.2 Differential Transmit Pair 3: These are USB 3.2-based high-speed differential signals for Port 3. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE4_​RXN / USB31_​4_​RXN

PCIE4_​RXP / USB31_​4_​RXP

I

USB 3.2 Differential Receive Pair 4: These are USB 3.2-based high-speed differential signals for Port 4. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

PCIE4_​TXN / USB31_​4_​TXN

PCIE4_​TXP / USB31_​4_​TXP

O

USB 3.2 Differential Transmit Pair 4: These are USB 3.2-based high-speed differential signals for Port 4. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​1

USB2N_​1

I/O

USB 2.0 Port 1 Transmit/Receive Differential Pair 1: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​2

USB2N_​2

I/O

USB 2.0 Port 2 Transmit/Receive Differential Pair 2: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​3

USB2N_​3

I/O

USB 2.0 Port 3Transmit/Receive Differential Pair 3: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​4

USB2N_​4

I/O

USB 2.0 Port 4 Transmit/Receive Differential Pair 4: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​5

USB2N_​5

I/O

USB 2.0 Port 5 Transmit/Receive Differential Pair 5: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​6

USB2N_​6

I/O

USB 2.0 Port 6 Transmit/Receive Differential Pair 6: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​7

USB2N_​7

I/O

USB 2.0 Port 7 Transmit/Receive Differential Pair 7: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​8

USB2N_​8

I/O

USB 2.0 Port 8 Transmit/Receive Differential Pair 8: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​9

USB2N_​9

I/O

USB 2.0 Port 9 Transmit/Receive Differential Pair 9: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

USB2P_​10

USB2N_​10

I/O

USB 2.0 Port 10 Transmit/Receive Differential Pair 10: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals.

GPP_​E9 / USB_​OC0#

I

Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred.

When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required.

Notes:

  1. OC# pins are not 5V tolerant.
  2. OC# pins can be shared between USB ports.
  3. Each USB connector should only have one OC# pin protection..

GPP_​A14 / USB_​OC1# / DDSP_​HPD3 / I2S3_​RXD / DISP_​MISC3 / DMIC_​CLK_​B1

I

Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred.

When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required.

Notes:

  1. OC# pins are not 5V tolerant.
  2. OC# pins can be shared between USB ports.
  3. Each USB connector should only have one OC# pin protection..

GPP_​A15 / USB_​OC2# / DDSP_​HPD4 / DISP_​MISC4 / I2S4_​SCLK

I

Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred.

When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required.

Notes:

  1. OC# pins are not 5V tolerant.
  2. OC# pins can be shared between USB ports.
  3. Each USB connector should only have one OC# pin protection..

GPP_​A16 / USB_​OC3# / I2S4_​SFRM

I

Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred.

When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required.

Notes:

  1. OC# pins are not 5V tolerant.
  2. OC# pins can be shared between USB ports.
  3. Each USB connector should only have one OC# pin protection..

USB_​VBUSSENSE

I

VBUS Sense for USB Device mode.

Note:This HW signal is not used on the PCH for USB device mode functionality. This signal should be connected to ground.

USB_​ID

I

ID detect for USB Device mode.

Note:This HW signal is not used on the PCH for dual role mode selection. The switching of USB port role is done through message from EC/PD over the SMLink1 . This signal should be connected to ground.

USB2_​COMP

I

USB Resistor Bias, analog connection point for an external resistor 113 Ω ± 1% connected to GND.

Note:It is not recommended to route the USB 3.2 signals to the USB connector for USB ports that is USB 2.0 capable only.