GGPP_E4 / DEVSLP0 | OD | Serial ATA Port [0] Device Sleep: This is an open-drain pin on the PCH side. PCH will tri-state this pin to signal to the SATA device that it may enter a lower power state (pin will go high due to Pull-up that’s internal to the SATA device, per DEVSLP specification). PCH will drive pin low to signal an exit from DEVSLP state. This pin can be mapped to SATA Port 0. |
GPP_E5 / DEVSLP1 | OD | Serial ATA Port [1] Device Sleep: This is an open-drain pin on the PCH side. PCH will tri-state this pin to signal to the SATA device that it may enter a lower power state (pin will go high due to Pull-up that’s internal to the SATA device, per DEVSLP specification). PCH will drive pin low to signal an exit from DEVSLP state. This pin can be mapped to SATA Port 1. |
PCIE11_TXP / SATA0A_TXP PCIE11_TXN / SATA0A_TXN | O | Serial ATA Differential Transmit Pair 0 [First Instance]: These outbound SATA Port 0 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 11 signals. |
PCIE11_RXP / SATA0A_RXP PCIE11_RXN / SATA0A_RXN | I | Serial ATA Differential Receive Pair 0 [First Instance]: These inbound SATA Port 0 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 11 signals. |
PCIE13_TXP / SATA0B_TXP PCIE13_TXN / SATA0B_TXN | O | Serial ATA Differential Transmit Pair 0 [Second Instance]: These outbound SATA Port 0 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 13 signals. |
PCIE13_RXP / SATA0B_RXP PCIE13_RXN / SATA0B_RXN | I | Serial ATA Differential Receive Pair 0 [Second Instance]: These inbound SATA Port 0 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 13 signals. |
PCIE12_TXP / SATA1A_TXP PCIE12_TXN / SATA1A_TXN | O | Serial ATA Differential Transmit Pair 1 [First Instance]: These outbound SATA Port 1 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 12. |
PCIE12_RXP / SATA1A_RXP PCIE12_RXN / SATA1A_RXN | I | Serial ATA Differential Receive Pair 1 [First Instance]: These inbound SATA Port 1 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 12. |
PCIE14_TXP / SATA1B_TXP PCIE14_TXN / SATA1B_TXN | O | Serial ATA Differential Transmit Pair 1 [Second Instance]: These outbound SATA Port 1 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 14. |
PCIE14_RXP / SATA1B_RXP PCIE14_RXN / SATA1B_RXN | I | Serial ATA Differential Receive Pair 1 [Second Instance]: These inbound SATA Port 1 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. The signals are multiplexed with PCIe* Port 14. |
GPP_E0 / SATAXPCIE0 / SATAGP0 | I | Serial ATA Port [0] General Purpose Inputs: When configured as SATAGP0, this is an input pin that is used as an interlock switch status indicator for SATA Port 0. Drive the pin to ‘0’ to indicate that the switch is closed and to ‘1’ to indicate that the switch is open. The default use of this pin is GPP_E0. Pin defaults to Native mode as SATAXPCIE0 depends on soft-strap. |
GPP_A12 / SATAXPCIE1 / SATAGP1 / I2S3_SFRM | I | Serial ATA Port [1] General Purpose Inputs: When configured as SATAGP1, this is an input pin that is used as an interlock switch status indicator for SATA Port 1. Drive the pin to ‘0’ to indicate that the switch is closed and to ‘1’ to indicate that the switch is open. This default use of this pin is GPP_A12. Pin defaults to Native mode as SATAXPCIE1 depends on soft-strap. |
GPP_E8 / SATA_LED# | OD O | Serial ATA LED: This signal is an open-drain output pin driven during SATA command activity. It is to be connected to external circuitry that can provide the current to drive a platform LED. When active, the LED is on. When tri-stated, the LED is off. An external Pull-up resistor to VCC3_3 is required. |