Intel® Pentium® Silver and Intel® Celeron® Processors

Datasheet, Volume 1 of 2

ID Date Version Classification
633935 12/27/2022 Public
Document Table of Contents
DSP

Integrated Pull-Ups and Pull-Downs

Signal

Resistor Type

Value

FSPI_​MOSI_​IO0

Pull-Up

20k ± 30%

FSPI_​MISO_​IO1

Pull-Up

20k ± 30%

FSPI_​IO2

Pull-Up

20k ± 30%

FSPI_​IO3

Pull-Up

20k ± 30%

FSPI_​CLK

Pull-up

20k ± 30%

FSPI_​CS0_​N

Pull-Up

20k ± 30%

FSPI_​CS1_​N

Pull-Up

20k ± 30%

FSPI_​CS2_​N

Pull-Up

20k ± 30%

Note:

The internal pull-up is disabled when PMC_​RSMRST_​N is asserted (during reset) and only enabled after PMC_​RSMRST_​N de-assertion