Intel® 600 Series Chipset Family Platform Controller Hub (PCH)

Specification Update

ID Date Version Classification
681906 01/07/2022 Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Document Table of Contents
Revision History Preface Identification Information Summary Tables of Changes Errata Details Specification Changes Specification Clarification
Revision History
Preface
Preface Affected Documents Nomenclature
Affected Documents
Nomenclature
Identification Information
Marking
Marking
Summary Tables of Changes
Summary Tables of Changes Codes Used in Summary Table Errata Summary Table Specification Changes Specification Clarifications
Codes Used in Summary Table
Errata Summary Table
Specification Changes
Specification Clarifications
Errata Details
Specification Changes
Specification Clarification

Specification Changes

GPP_​S Group Internal Pull-up/Pull-down Value Support

The GPP_​S group only supports 5 kohm internal pull-up/pull-down programmed via the corresponding GPIO TERM bits, instead of 20 kohm pull-up/pull-down as documented.

The TERM register bit description for GPP_​S group in the Intel® 600 Series Chipset Family Platform Controller Hub (PCH) Datasheet Volume 2 of 2 (#680836) will be updated to reflect the 5 kohm pull-up/pull-down support.

Specification Clarification