Increment Monotonic Counter

RPMC Support Using eSPI OOB (eRPMC)

Architecture Specification

ID	Date	Version	Classification
739180	03/01/2023		Public

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This command is used to increment the Monotonic counter by 1.

RPMC Increment Monotonic Counter OOB Command:

Byte #	7	6		5		4	3		2		1	0
0	eSPI Cycle Type: OOB Message=21h
1	Tag[3:0]=0h						Length[11:8]=0h
2	Length[7:0]=32h
3	Dest Slave Addr[7:1]=07h											0
4	Command Code=0Fh
5	Byte Count=2Fh
6	Source Slave Address[7:1]= 08h											1
7	MCTP Reserved=0h							Header Version
8	Destination Endpoint ID
9	Source Endpoint ID
10	SOM		EOM		Packet Seq #			TO		Message Tag
11	IC		Message Type=7Dh
12	RPMC Device
13	Opcode = 9Bh
14	Cmd Type = 02h
15	Counter Addr[7:0]
16	Rsvd=00h
17	Counter Data[31:24]
…	…
20	Counter Data[7:0]
21	Signature[255:248]
…	…
52	Signature[7:0]

Response:

Byte #	7	6		5		4	3		2		1	0
0	eSPI Cycle Type: OOB Message=21h
1	Tag[3:0]=0h						Length[11:8]=0h
2	Length[7:0]=0Ch
3	Dest Slave Addr[7:1]=08h											0
4	Command Code=0Fh
5	Byte Count=09h
6	Source Slave Address[7:1]= 07h											1
7	MCTP Reserved=0h							Header Version
8	Destination Endpoint ID
9	Source Endpoint ID
10	SOM		EOM		Packet Seq #			TO		Message Tag
11	IC		Message Type=7Dh
12	RPMC Device
13	Counter Addr[7:0]
14	Extended Status[7:0]

After the command is issued, the device ensures that the received transaction is error free. This includes checking following conditions:

RPMC message payload size is correct. (Including OP1 = 40 bytes)
Counter Address falls within the range of supported counters.
The Monotonic Counter corresponding to the requested Counter Address was previously initialized.
The HMAC Key Register corresponding to the requested Counter Address was previously initialized.
The requested Signature matches the HMAC-SHA-256 based signature computed based on received input parameters.
- HMAC Message[63:0] = (OpCode[7:0], CmdType[7:0]. CounterAddr[7:0]. Reserved[7:0], CounterData[31:0])
- HMAC Key[255:0] = HMAC_Key_Register[Counter_Addreess][255:0]
The received Counter Data matches the current value of the counter read from the device.

If the received transaction is error free the device successfully executes the command and posts “successful completion” extended status. The increment counter implementation must ensure that the counter increment operation is performed within the allowed command timeout.

If the received transaction has errors, the device does not execute the transaction and posts the corresponding error in extended status.

Expected Extended Status [7:0] results:

Extended Status [7:0]	Applicable CmdType(s)	Description
10000000	02h	This status is set on successful completion (no errors) of OP1 command.
0XXXXXX1	02h	N/A. This bit cannot be read as 1.
0XXXX1XX	02h	This bit is set on Signature Mismatch, Counter Address out of range when correct payload size is received; or CmdType is out of range; or incorrect payload size is received.
0XXX1XXX	02h	This bit is set only when the correct payload size is received. This bit is set on HMAC Key Register (or Monotonic Counter) is uninitialized on previous OP1 command.
0XX1XXXX	02h	This bit is set only when the correct payload size is received. The bit is set when the received counter data filed does not match the actual counter value read from the device.