Intel High Definition Audio Signals

GPP_​R4 / HDA_​RST#

O

Intel HD Audio Reset: Master H/W reset to internal/external codecs.

GPP_​R1 / HDA_​SYNC / I2S0_​SFRM

O

Intel HD Audio Sync: 48 kHz fixed rate frame sync to the codecs. Also used to encode the stream number.

GPP_​R0 / HDA_​BCLK / I2S0_​SCLK

O

Intel HD Audio Bit Clock: Up to 24 MHz serial data clock generated by the Intel HD Audio controller.

GPP_​R2 / HDA_​SDO / I2S0_​TXD

O

Intel HD Audio Serial Data Out: Serial TDM data output to the codecs. The serial output is double-pumped for a bit rate of up to 48 Mb/s.

GPP_​R3 / HDA_​SDI0 / I2S0_​RXD

I

Intel HD Audio Serial Data In 0: Serial TDM data input from the two codec(s). The serial input is single-pumped for a bit rate of up to 24 Mb/s. These signals contain integrated Pull-down resistors, which are enabled while the primary well is powered.

GPP_​R5 / HDA_​SDI1 / I2S1_​RXD

I

Intel HD Audio Serial Data In 1: Serial TDM data input from the two codec(s). The serial input is single-pumped for a bit rate of up to 24 Mb/s. These signals contain integrated Pull-down resistors, which are enabled while the primary well is powered.

I²S/PCM Interface

GPP_​R0 / HDA_​BCLK / I2S0_​SCLK

I/O

I²S/PCM serial bit clock 0:Clock used to control the timing of a transfer. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A23 / I2S1_​SCLK

I/O

I²S/PCM serial bit clock 1:This clock is used to control the timing of a transfer. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A7 / I2S2_​SCLK / DMIC_​CLK_​A0

I/O

I²S/PCM serial bit clock 2:This clock is used to control the timing of a transfer. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A11 / PMC_​I2C_​SDA / I2S3_​SCLK

I/O

I²S/PCM serial bit clock 3:Clock used to control the timing of a transfer. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A15 / USB_​OC2# / DDSP_​HPD4 / DISP_​MISC4 / I2S4_​SCLK

I/O

I²S/PCM serial bit clock 4:This clock is used to control the timing of a transfer. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A19 / DDSP_​HPD1 / DISP_​MISC1 / I2S5_​SCLK

I/O

I²S/PCM serial bit clock 5: This clock is used to control the timing of a transfer. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​R1 / HDA_​SYNC / I2S0_​SFRM

I/O

I²S/PCM serial frame indicator 0: This signal indicates the beginning and the end of a serialized data word. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​R7 / I2S1_​SFRM

I/O

I²S/PCM serial frame indicator 1: This signal indicates the beginning and the end of a serialized data word. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A8 / I2S2_​SFRM / CNV_​RF_​RESET# / DMIC_​DATA_​0

I/O

I²S/PCM serial frame indicator 2: This signal indicates the beginning and the end of a serialized data word. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A12 / SATAXPCIE1 / SATAGP1 / I2S3_​SFRM

I/O

I²S/PCM serial frame indicator 3: This signal indicates the beginning and the end of a serialized data word. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A16 / USB_​OC3# / I2S4_​SFRM

I/O

I²S/PCM serial frame indicator 4: This signal indicates the beginning and the end of a serialized data word. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​A20 / DDSP_​HPD2 / DISP_​MISC2 / I2S5_​SFRM

I/O

I²S/PCM serial frame indicator 5: This signal indicates the beginning and the end of a serialized data word. Can be generated internally (Master mode) or taken from an external source (Slave mode).

GPP_​R2 / HDA_​SDO / I2S0_​TXD

O

I²S/PCM transmit data (serial data out)0: This signal transmits serialized data. The sample length is a function of the selected serial data sample size.

GPP_​R6 / I2S1_​TXD

O

I²S/PCM transmit data (serial data out)1: This signal transmits serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A9 / I2S2_​TXD / MODEM_​CLKREQ / CRF_​XTAL_​CLKREQ / DMIC_​CLK_​A1

O

I²S/PCM transmit data (serial data out)2: This signal transmits serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A13 / PMC_​I2C_​SCL / I2S3_​TXD / DMIC_​CLK_​B0

O

I²S/PCM transmit data (serial data out)3: This signal transmits serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A17 / DISP_​MISCC / I2S4_​TXD

O

I²S/PCM transmit data (serial data out)4: This signal transmits serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A21 / DDPC_​CTRLCLK / I2S5_​TXD

O

I²S/PCM transmit data (serial data out)5: This signal transmits serialized data. The sample length is a function of the selected serial data sample size.

GPP_​R3 / HDA_​SDI0 / I2S0_​RXD

I

I²S/PCM receive data (serial data in)0: This signal receives serialized data. The sample length is a function of the selected serial data sample size.

GPP_​R5 / HDA_​SDI1 / I2S1_​RXD

I

I²S/PCM receive data (serial data in)1: This signal receives serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A10 / I2S2_​RXD / DMIC_​DATA1

I

I²S/PCM receive data (serial data in)2: This signal receives serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A14 / USB_​OC1# / DDSP_​HPD3 / I2S3_​RXD / DISP_​MISC3 / DMIC_​CLK_​B1

I

I²S/PCM receive data (serial data in)3: This signal receives serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A18 / DDSP_​HPDB / DISP_​MISCB / I2S4_​RXD

I

I²S/PCM receive data (serial data in)4: This signal receives serialized data. The sample length is a function of the selected serial data sample size.

GPP_​A22 / DDPC_​CTRLDATA / I2S5_​RXD

I

I²S/PCM receive data (serial data in)5: This signal receives serialized data. The sample length is a function of the selected serial data sample size.

GPP_​D19 / I2S_​MCLK1

O

I²S/PCM Master reference clock 1: This signal is the master reference clock that connects to an audio codec.

GPP_​F8 / I2S_​MCLK2 (applicable for UP3 only)

I/O

I²S/PCM Master reference clock 2: This signal is the master reference clock that connects to an audio codec. Can be configured as an input as an alternative low power audio I/O clock source for I2S/ PCM, PDM Microphone, and SoundWire* and may be requested in S0 or S0ix states.

DMIC Interface

GPP_​A7 / I2S2_​SCLK / DMIC_​CLK_​A0

O

Digital Mic Clock A0:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control.

GPP_​A9 / I2S2_​TXD / MODEM_​CLKREQ / CRF_​XTAL_​CLKREQ / DMIC_​CLK_​A1

or

GPP_​S4 / SNDW2_​CLK / DMIC_​CLK_​A1

O

Digital Mic Clock A1:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control.

GPP_​A13 / PMC_​I2C_​SCL / I2S3_​TXD / DMIC_​CLK_​B0

or

GPP_​S2 / SNDW1_​CLK / DMIC_​CLK_​B0

O

Digital Mic Clock B0:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control.

GPP_​A14 / USB_​OC1# / DDSP_​HPD3 / I2S3_​RXD / DISP_​MISC3 / DMIC_​CLK_​B1

or

GPP_​S3 / SNDW1_​DATA / DMIC_​CLK_​B1

O

Digital Mic Clock B1:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control.

GPP_​A8 / I2S2_​SFRM / CNV_​RF_​RESET# / DMIC_​DATA0

or

GPP_​S7 / SNDW3_​DATA / DMIC_​DATA0

I

Digital Mic Data:Serial data input from the digital mic.

GPP_​A10 / I2S2_​RXD / DMIC_​DATA1

or

GPP_​S5 / SNDW2_​DATA / DMIC_​DATA1

I

Digital Mic Data:Serial data input from the digital mic.

SoundWire Interface

GPP_​S0 / SNDW0_​CLK

I/O

SoundWire Clock: Serial data clock to external peripheral devices.

GPP_​S2 / SNDW1_​CLK / DMIC_​CLK_​B0

I/O

SoundWire Clock: Serial data clock to external peripheral devices.

GPP_​S4 / SNDW2_​CLK / DMIC_​CLK_​A1

I/O

SoundWire Clock: Serial data clock to external peripheral devices.

GPP_​S6 / SNDW3_​CLK / DMIC_​CLK_​A0

I/O

SoundWire Clock: Serial data clock to external peripheral devices.

GPP_​S1 / SNDW0_​DATA

I/O

SoundWire Data: Serial data input from external peripheral devices.

GPP_​S3 / SNDW1_​DATA / DMIC_​CLK_​B1

I/O

SoundWire Data: Serial data input from external peripheral devices.

GPP_​S5 / SNDW2_​DATA / DMIC_​DATA1

I/O

SoundWire Data: Serial data input from external peripheral devices.

GPP_​S7 / SNDW3_​DATA / DMIC_​DATA0

I/O

SoundWire Data: Serial data input from external peripheral devices.

SNDW_​RCOMP

I/O

SoundWire RCOMP:200ohm +/- 1% compensation resistor required to ground.

Misc

GPP_​B14 / SPKR / TIME_​SYNC1 / GSPI0_​CS1#

O

Speaker Output:Used for connection to external speaker for POST sounds if not using HD_​Audio embedded option.