Intel® Pentium® Silver and Intel® Celeron® Processors Datasheet, Volume 1

Datasheet

ID Date Version Classification
633935 17/06/2021 00:00:00 Public Content

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Document Table of Contents
DSP

Features Supported

  • HW Command Queuing support complaint to eMMC* v5.1 specification
  • Support enhanced Strobe for HS400 mode @1.8 V
  • Both ADMA2/DMA and Non-DMA mode of operation
  • Transfers the data in 1 bit, 4 bit and 8 bit mode
  • Support 64b address
  • Cyclic Redundancy Check CRC7 for command and CRC16 for data integrity
  • Support for Tx Path tuning and retention of DLL delay values