Intel® Pentium® Silver and Intel® Celeron® Processors Datasheet, Volume 1

Datasheet

ID Date Version Classification
633935 17/06/2021 00:00:00 Public Content

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
DSP

User Mode Instruction Prevention (UMIP)

User Mode Instruction Prevention (UMIP) provides additional hardening capability to OS kernel by allowing certain instructions to execute only in supervisor mode (Ring 0).

If the OS opt-in to use UMIP, the following instruction are enforced to run in supervisor mode:

  • SGDT - Store the GDTR register value
  • SIDT - Store the IDTR register value
  • SLDT - Store the LDTR register value
  • SMSW - Store Machine Status Word
  • STR - Store the TR register value

An attempt at such execution in user mode causes general protection exception (#GP).

UMIP specifications and functional descriptions are included in the Intel® 64 Architectures Software Developer’s Manual, Volume 3, available at:

http://www.intel.com/products/processor/manuals