ATX12VO (12V Only) Desktop Power Supply

Design Guide

ID 613768
Date 01/03/2022
Public

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Document Table of Contents

I_PSU% Singal (Required)

I_​PSU% is a signal coming from the power supply that reports the proportionality of Power being delivered by the +12VDC rail with the Output-Load rating of the PSU. Which is represented as a unitless percentage of the total capacity using a current mode. If multiple +12VDC rails are implemented (for example, +12V1DC, +12V2DC) then I_​PSU% must report the utilization ratio of the combined total capacity.

Table 4-11: I_​PSU% Signal Characteristics

Parameter

Description

Sensitivity

10 µA per 1% of capacity

1.0mA @ 100% of capacity

2.0mA @ 200% of capacity

Examples:

750W, 61A = 10uA /.61A

600W, 50A = 10uA/.5A

Maximum Reporting Capability

200%1

Operational voltage range

0 - 3.3V

RL and CL Time Constant & Sample Values

RC Time Constant Value = 924 ns = RL * CL

(± 10%, Error margin for RC Time Constant is large due to variance in standard resistor and capicator values that would make up this time constant value.)

RL_​low = 511 Ohms 1% for 1V @ 200% loading

CL_​low = 1800pF, 5% for 1V @ 200% loading

RL_​high = 1.65K ohm 1% for 3.3V @200% loading

CL_​high = 560 pF, 5% for 3.3V @200% loading

Accuracy I_​PSU%

≤5% @ 121% to 200% of Rated Power

≤2.5% @ 80% to 120% of Rated Power≤10% @ 40% to 79% of Rated Power≤20% @ 20% to 39% of Rated Power

Accuracy needs to be tuned to be best @ 100% load.

I_​PSU% Delay Time

<100 uSec (Required)<60 uSec (Recommended)

Testing Condition: step size is from 30% of rated power to 120% of rated power, See Figure 4-6

I_​PSU% Ripple/Noise

Measured @ 100% load,

Required <10% of full scale voltage

Recommended <7% of full scale voltage

Note:The Spec allows that based on current mode reporting 200% of the power supplies rated capacity is possible for the system to read. There is not a requirement for the power supply to deliver up to 200% of rated capacity outside of Power Excursion requirements. Refer to Table 4-12 for peak power requirements.

I_​PSU% Delay time is defined as the amount of time between when a current change happens and when the I_​PSU% signal from the PSU reports that change to the system. This Delay time is measured when the current change reaches the 90% level of the new current value to when the I_​PSU% signal reaches 90% level reporting the % of total output. Testing needs to happen with the DC Load Slew Rate set to at least 5A/uS. Test condition is when the current increases from 30% to 120% of the rated PSU size. This is similar to the DC Output Transient Step size in Table 4-3. During testing of all I_​PSU% testing conditions (Accuarcy, Delay Time, and Ripple/Noise) the capactive load described in Table 4-7 is applied to these tests.

Figure 4-6: I_​PSU% Delay Time Diagram

image9.png

Inside the power supply, a transconductance amplifier needs to be added to report the I_​PSU% signal. Figure 4-7 below is a reference schematic for the circuitry that needs to be included. The green box represents the power supply. For the transconductance amplifier the Iout equation of I_​PSU% is shown here:

Io=Rf / Ri*Rrefvi

The Figure shows the Total 12V Main output that represents all power connectors to the system. The diagram is simplified to show all load with just I1.

The I_​PSU% signal is routed to the Psys pin on the CPU’s IMVP controller on the motherboard. Also, on the motherboard is RL and CL, which are in parallel with each other and placed as close to the IMVP controller as possible. Table 4-11 shows the range of values that RL and CL should be. Capicator recommendation is C0G (NP0) type. Resistors are recommended to be 1% type and capicator are recommended to be 5% type.

For all Accuracy, Delay Time and Ripple/Noise measurements, testing is to be completed with both the RL_​low + CL_​low and RL_​high + CL_​high combinations.

When calculating the value for C3 the I_​PSU% Delay time requirements need to be considered.

Figure 4-7: Recommended Circuit Diagram for I_​PSU% signal inside PSU

image10.png

PCIe* CEM Gen 5 Power Excursions and I_​​PSU% (Required)

Section 3.1 of this document details peak power requirements for a power supply. When a power supply includes I_​PSU%, the peak power requirements are less for all time criteria except the short time and highest level. This reduction in peak power requirements creates a significant benefit to use the I_​PSU% feature in a desktop system. This is because the power supply is reporting the system consumption back to the system and the power management control of the processor can react to it quickly. Based on the power budgets in Table 3-2 and peak power of both the Processor detailed in Table 2-1 and the PCIe* Add-In-Card in Section 3.1, the following Peak Power Requirements are defined for a Power Supply that includes I_​PSU%. These Peak Power requirements are different based on its rated output power and inclusion of the 12VHPWR connector to lower the impact of these peak power requirements in smaller power supplies or power supplies without the 12VHPWR connector. The PCIe* Power Excursions defined in Section 3.1 will have the biggest impact on a power supply when it includes a 12VHPWR connector. See Table 4-12 for details.

Table 4-12: PCIE AIC and PSU Power Budget used for Peak Power Excursion

Power Excursion as a% of PSU Size

Time for Power Excursion (TE)

Testing Duty Cycle

≤450 watts or any PSU without a 12VHPWR connector

450 Watts < PSU < 1000 watts

≥1000 watts

100%

100%

100%

Infinite

--

110%

110%

110%

100mS

50%

120%

120%

120%

10mS

25%

130%

130%

150%

1mS

20%

150%

200%

200%

110 uS

10%

The 200% Peak Power Excursion time increases compare to what is listed in Table 3-3 to include the time it takes for I_​PSU% to report that the power supply is above 100% plus the time it takes for the processor to react to that level of power excursion.

The Testing Duty Cycle is the same as defined in Section 3.1.2, which is needed to test a specific power supply.

The Test Criteria for these peak power excursions are different than what was specified in Section 3.1.2. When a PSU includes I_​PSU%, Table 4-13 and Table 4-14 show the RMS test conditions based on the power excursions defined. For all power supplies with a rated wattage different than the two examples shown will require a similar RMS calculation to be performed.

Table 4-13: Duty Cycle Example Test Criteria for a 750W PSU – RMS

Duty Cycle

Time for Power Excursion (TE)

Time Constant (TC)

Power @ TE

Power @ TC

10%

110µS

890µS

1500w

613w

20%

1mS

4mS

975w

682w

25%

10mS

30mS

900w

693w

50%

100mS

100mS

825w

667w

Table 4-14: Duty Cycle Example Test Criteria for a 1000W PSU – RMS

Duty Cycle

Time for Power Excursion (TE)

Time Constant (TC)

Power @ TE

Power @ TC

10%

110µS

890µS

2000w

817w

20%

1mS

4mS

1500w

830w

25%

10mS

30mS

1200w

924w

50%

100mS

100mS

1100w

890w

Notes:
  1. The Capacitive Load mentioned in Table 4-6 is expected to be applied to this test scenario.
  2. Total Test time for each Power Excursion testing time is expected to last until thermal saturation occurs in the PSU.
  3. More details about test time for each row above and formulas to calculate TC and TE power values for different PSU sizes will be detailed in the “Desktop Platform Form Factor Power Supply Test Plan – (Doc #338448)