Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Introduction
Use the sidebar to browse through the register files or search for something in particular. Contact pcdcadmin@intel.com for assistance.
The version used in this web page indicates the EDS version the registers are based off of, together with the web posting update release info.For example, Version 0.71 indicates the registers are based on the EDS Version 0.7 but have first update after the PDF EDS release.Similarly, 0.72, 0.73, etc.indicate second, third, etc update after rev 0.7 release.
The following notations and definitions are used in the register description:
RO | Read Only. Writes to this register bit have no effect. When writing to RO bits, software must preserve the value. When software updates a register that has RO fields, it must read the register value first so that the appropriate merge between the reserved and updated fields will occur. |
WO | Write Only. Reads to this register bit have no effect. |
RW | Read/Write. A register bit with this attribute can be read and written. |
RW / O | Read / Write Once. A register bit with this attribute can be written only once after power up.After the first write, the bit becomes read only. |
RW / 1C | Read / Write Clear. The register bit is set to 1 by hardware and cleared by software writing a 1 to it. |
RW / 1S | Read / Write Set. The register bit is set to 1 by software and cleared by hardware. |
RW / L | Read / Write Locked. A register bit with this attribute can be read and write, but cannot be written after the lock bit is set. |
/ V | Volatile or variable. This attribute indicates that the register bit can be updated by hardware(aside from resetting it). For example, RO/ V means hardware controls the value; RW / V means that generally the bit is written by SW / FW but can be also updated by hardware. |
/ P | This attribute indicates that the register is reset only on loss of power. |
/ S | This attribute indicates that the initial value of the register bit is taken from software. |
The PCH contains registers and bits that are reserved. These are designated by being defined as Reserved or RSVD. In addition, registers or register bits not defined in this document are also reserved. Software must not attempt to access a reserved register, use the value read from a reserved register or bit, or modify the value in a reserved register or bit. Doing so is unsupported and may cause unexpected behavior on the platform. When writing to reserved bits, software must preserve the value. When software updates a register that has reserved fields, it must read the register value first so that the appropriate merge between the reserved and updated fields will occur.