Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
HSIO Power Management Configuration 2 (MODPHY_PM_CFG2) – Offset 10c4
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:16 | - | - | Reserved
|
15:0 | FFFFh | RW | HSIO Lane Sx SUS Well Power Gating Policy [15:0] (MLSXSWPGP) This is a bit per lane that controls SUS Well Power Gating for a HSIO lane when system is in Sx. |