Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Power Management Capability ID Register (POWERCAPID) – Offset 80
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:27 | 00h | RO | (PMESUPPORT) This 5-bit field indicates the power states in which the function can assert the PME#. |
26:19 | - | - | Reserved
|
18:16 | 3h | RO | Version (VERSION) Indicates support for Revision 1.2 of the PCI Power Management Specification. |
15:8 | 90h | RO | Next Capability (NXTCAP) Points to the next capability structure. This points to NULL if eitherENABLE_PCI_IDLE_CAP is 0 or if Disable PCI Device Idle capability bit is set as 1in the private space. |
7:0 | 01h | RO | Power Management Capability (POWER_CAP) Indicates this is power management capability. |