Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Power Scheduler Control-2 (PWR_SCHED_CTRL2) – Offset 8144
These bit enable by EP type those EPs classes that are considered for determining next periodic active interval for pre-wake of the periodic_active signal. EP classes that are disabled may never be observed in setting of the periodic_active signal.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:10 | - | - | Reserved
|
9 | 1b | RW | HS Interrupt-OUT Alarm (HS_INT_OUT_ALRM)
|
8 | 1b | RW | HS Interrupt-IN Alarm (HS_INT_IN_ALRM)
|
7 | 0b | RW | SS Interrupt-OUT FC Alarm (SS_INT_OUT_FC_ALRM)
|
6 | 0b | RW | SS Interrupt-IN Alarm (SS_INT_IN_FC_ALRM)
|
5 | 1b | RW | SS Interrupt-OUT & not in FC Alarm (SS_INT_OUT_ALRM)
|
4 | 1b | RW | SS Interrupt-IN & not in FC Alarm (SS_INT_IN_ALRM)
|
3 | 1b | RW | HS ISO-OUT Alarm (HS_ISO_OUT_ALRM)
|
2 | 1b | RW | HS ISO-IN Alarm (HS_ISO_IN_ALRM)
|
1 | 1b | RW | SS ISO-OUT Alarm (SS_ISO_OUT_ALRM)
|
0 | 1b | RW | SS ISO-IN Alarm (SS_ISO_IN_ALRM)
|