Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
RIRB Status (RIRBSTS) – Offset 5d
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
6:3 | - | - | Reserved
|
2 | 0b | RW/1C/V | Response Overrun Interrupt Status (RIRBOIS) Hardware sets this bit to a 1 when the RIRB DMA engine is not able to write the |
1 | - | - | Reserved
|
0 | 0b | RW/1C/V | Response Interrupt (RINTFL) Hardware sets this bit to a 1 when an interrupt has been generated after N number |