Intel® Core™ Ultra Processor

Datasheet, Volume 1 of 2
Supporting Intel® Core™ Ultra Processor for U/H-series Platforms, formerly known as Meteor Lake

ID Date Version Classification
792044 12/15/2023 Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Introduction

This document is intended for Original Equipment Manufacturers (OEMs), Original Design Manufacturers (ODM) and BIOS vendors creating products based on the Intel® Core™ Ultra Processor.

This document assumes a working knowledge of the vocabulary and principles of interfaces and architectures such as PCI Express* (PCIe*), Universal Serial Bus (USB), Advance Host Controller Interface (AHCI), eXtensible Host Controller Interface (xHCI), and so on.

This document abbreviates buses as Bn, devices as Dn and functions as Fn. For example, Device 31 Function 0 is abbreviated as D31:F0, Bus 1 Device 8 Function 0 is abbreviated as B1:D8:F0. Generally, the bus number will not be used, and can be considered to be Bus 0.

The Intel® Core™ Ultra Processor is a 64-bit, multi-core processor built on Intel 4 process technology.

  • The H-Processor Line offered in a 1-Chip Platform that includes the Compute, SOC, GT, and IOE tile on the same package.
  • The U-Processor Line offered in a 1-Chip Platform that includes the Compute, SOC, GT, and IOE tile on the same package.

The following table describes the different Intel® Core™ Ultra Processor processor lines:

Processor Lines

Processor Line1

Package

Processor Base Power

(TDP)2, 3

Compute Tile

P-Cores

Compute Tile

E-Cores

Low Power

E-Cores

Graphics Configuration

Xe-Cores

Platform Type

U BGA

BGA2049

15 W

up to 2

up to 8

2

up to 4

1-Chip

H BGA

BGA2049

28 W

up to 6

8

2

up to 8

1-Chip

Notes:
  1. Processor lines offering may change.
  2. For additional Processor Base Power Configurations, refer to Processor Base Power Thermal and Power Specifications. For adjustment to the Processor Base Power, it is required to preserve base frequency associated with the sustained long-term thermal capability.
  3. Processor Base Power workload does not reflect I/O connectivity cases such as Thunderbolt.

H Processor Line Platform Diagram

Note:

Not all processor interfaces and features are presented in all Processor Lines. The presence of various interfaces and features will be indicated within the relevant sections and tables.