Power and Ground Signals

Intel® Processor and Intel® Core™ i3 N-Series

Datasheet, Volume 1 of 2

ID	Date	Version	Classification
759603	01/04/2023		Public

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This section describes the power rails.

Power Rail Descriptions

Name	Description
VCC_VNNEXT_1P05	Used for FIVR PRIM_CORE bypass mode during S0ix and Sx: 1.05 V
VCC_V1P05EXT_1P05	Used for FIVR PCH IO bypass mode during S0ix and Sx: 1.05 V
VCCA_CLKLDO_1P8	Analog supply for internal clocks: 1.8 V
VCCPRIM1P05_OUT_PCH	1.05 V Primary Well: for CNVi and other internal I/O blocks.
VCCDSW_1P05	Deep Sx Well: 1.05 V. This rail is generated by on die DSW low dropout (LDO) linear regulator to supply DSW core logic.
VCCPRIM_1P8	1.8 V Primary Well.
VCCPRIM_3P3	3.3 V Primary Well.
VCCPGPPR	Audio Power 3.3 V or 1.8 V. If powered at 3.3 V, the 3.3 V supply can come from VCCPRIM_3P3 supply. If powered at 1.8 V, the 1.8 V supply can come from VCCPRIM_1P8 supply.
VCCRTC	RTC Well Supply. This rail can drop to 2.0 V if all other planes are off. This power is not expected to be shut off unless the RTC battery is removed or drained. Notes: VCCRTC nominal voltage is 3.0 V. This rail is intended to always come up first and always stay on. It should NOT be power cycled regularly on non-coin battery designs. Implementation should not attempt to clear CMOS by using a jumper to pull VCCRTC low. Clearing CMOS can be done by using a jumper on RTCRST# or GPI.
VCCDPHY_1P24	1.24 V for CNVi logic. This rail is generated internally with a LDO and needs to be routed to the motherboard so that the rail can be supplied back to the processor.
VCCLDOSTD_0P85	This rail is generated internally and needs to be routed out to the motherboard for decoupling purpose.
VCC1P05_OUT_FET	FIVR output rail: 1.05 V, used for CPU rails VCCST/STG.
VSS	Ground
VCCCORE	Processor IA Cores and Ring power rail
VCCGT	Processor Graphics power rail
VCCANA	Support internal Analog Rails, TCSS, Display, PCIE and other internal Blocks.
VCCIN_AUX	Support internal FIVR’s, SA, PCIe, Display IO and other internal Blocks.
VCCIN_AUX_FLTR	Support internal FIVR’s, SA, PCIe, Display IO and other internal Blocks. this pin should be connected to decoupling for filter.
VCC1P05_PROC	Sustain and Sustain Gated Power Rail
VDD2	System Memory power rail
VCCGT_SENSE	Isolated, low impedance voltage sense pins. They can be used to sense or measure voltage near the silicon.
VCC_SENSE
VCCANA_SENSE
VCCINAUX_SENSE
VCC_MIPILP	Note:When MIPI DSI interface is been used, VCC_MIPILP should be connected to 1.26V (on board VR).

Processor Ground Rails Signals

Signal Name	Description	Dir.	Buffer Type	Link Type
VSSGT_SENSE	Isolated, low impedance Ground sense pins. They can be used for the reference ground near the silicon.	N/A	GND_ SENSE	—
VSS_SENSE
VSSANA_SENSE
VSSINAUX_SENSE