12th Generation Intel® Core™ Processor Datasheet Volume 2 of 2
ID | Date | Version | Classification |
---|---|---|---|
767626 | 07/13/2023 | Public |
D1:F0-1 PCI Express* Controller Registers Registers
This chapter documents the registers of the processor PCIe Gen5 Controller devices.
The processor contains multiple PCIe controller devices:
• Bus: 0, Device: 1, Function: 0 (PCI0 x16)
• Bus: 0, Device: 1, Function: 1 (PCI1 x8)
Note: Register default values are taken from device PCI0 only. Consult Volume 1 of this document for Device IDs
Offset | Size (Bytes) | Register Name (Register Symbol) | Default Value |
---|---|---|---|
0h | 4 | 00000000h | |
4h | 2 | 0000h | |
6h | 2 | 0000h | |
8h | 4 | 00000000h | |
Ch | 1 | 00h | |
Dh | 1 | 00h | |
Eh | 1 | 00h | |
10h | 4 | 00000000h | |
14h | 4 | 00000000h | |
18h | 4 | 00000000h | |
1Ch | 2 | 0000h | |
1Eh | 2 | 0000h | |
20h | 4 | 00000000h | |
24h | 4 | 00000000h | |
28h | 4 | 00000000h | |
2Ch | 4 | 00000000h | |
34h | 1 | 00h | |
3Ch | 1 | 00h | |
3Dh | 1 | 00h | |
3Eh | 2 | 0000h | |
40h | 2 | 0000h | |
42h | 2 | 0000h | |
44h | 4 | 00000000h | |
48h | 2 | 0000h | |
4Ah | 2 | 0000h | |
4Ch | 4 | 00000000h | |
50h | 2 | 0000h | |
52h | 2 | 0000h | |
54h | 4 | 00000000h | |
58h | 2 | 0000h | |
5Ah | 2 | 0000h | |
5Ch | 2 | 0000h | |
5Eh | 2 | 0000h | |
60h | 4 | 00000000h | |
64h | 4 | 00000000h | |
68h | 2 | 0000h | |
6Ah | 2 | 0000h | |
6Ch | 4 | 00000000h | |
70h | 2 | 0000h | |
72h | 2 | 0000h | |
74h | 4 | 00000000h | |
78h | 2 | 0000h | |
7Ah | 2 | 0000h | |
80h | 2 | 0000h | |
82h | 2 | 0000h | |
84h | 4 | 00000000h | |
88h | 4 | 00000000h | |
8Ch | 2 | 0000h | |
98h | 2 | 0000h | |
9Ch | 4 | 00000000h | |
A0h | 2 | 0000h | |
A2h | 2 | 0000h | |
A4h | 4 | 00000000h | |
100h | 4 | 00000000h | |
104h | 4 | 00000000h | |
108h | 4 | 00000000h | |
10Ch | 4 | 00000000h | |
110h | 4 | 00000000h | |
114h | 4 | 00000000h | |
118h | 4 | 00000000h | |
11Ch | 4 | 00000000h | |
120h | 4 | 00000000h | |
124h | 4 | 00000000h | |
128h | 4 | 00000000h | |
12Ch | 4 | 00000000h | |
130h | 4 | 00000000h | |
134h | 4 | 00000000h | |
138h | 4 | 00000000h | |
13Ch | 4 | 00000000h | |
140h | 4 | 00000000h | |
144h | 4 | 00000000h | |
150h | 4 | 00000000h | |
154h | 4 | 00000000h | |
158h | 4 | 00000000h | |
200h | 4 | 00000000h | |
204h | 4 | 00000000h | |
208h | 4 | 00000000h | |
20Ch | 4 | 00000000h | |
220h | 4 | 00000000h | |
224h | 2 | 0000h | |
226h | 2 | 0000h | |
284h | 4 | 00000000h | |
288h | 4 | 00000000h | |
28Ch | 2 | 0000h | |
28Eh | 2 | 0000h | |
290h | 4 | 00000000h | |
294h | 4 | 00000000h | |
29Ah | 2 | 0000h | |
29Ch | 4 | 00000000h | |
2A0h | 4 | 00000000h | |
2A6h | 2 | 0000h | |
A00h | 4 | 00000000h | |
A04h | 2 | 0000h | |
A06h | 2 | 0000h | |
A08h | 2 | 0000h | |
A0Ah | 2 | 0000h | |
A0Ch | 4 | 00000000h | |
A10h | 4 | 00000000h | |
A14h | 4 | 00000000h | |
A18h | 4 | 00000000h | |
A1Ch | 4 | 00000000h | |
A20h | 4 | 00000000h | |
A24h | 4 | 00000000h | |
A28h | 4 | 00000000h | |
A2Ch | 4 | 00000000h | |
A30h | 4 | 00000000h | |
A34h | 4 | 00000000h | |
A38h | 4 | 00000000h | |
A3Ch | 4 | 00000000h | |
A40h | 4 | 00000000h | |
A44h | 4 | 00000000h | |
A48h | 4 | 00000000h | |
A4Ch | 4 | 00000000h | |
A50h | 4 | 00000000h | |
A54h | 4 | 00000000h | |
A58h | 4 | 00000000h | |
A90h | 4 | 00000000h | |
A94h | 4 | 00000000h | |
A98h | 4 | 00000000h | |
A9Ch | 4 | Physical Layer 16.0 GT/s Extended Capability Header (PL16GECH) | 00000000h |
AA0h | 4 | 00000000h | |
AA4h | 4 | 00000000h | |
AA8h | 4 | 00000000h | |
AACh | 4 | Physical Layer 16.0 GT/s Local Data Parity Mismatch Status (PL16LDPMS) | 00000000h |
AB0h | 4 | Physical Layer 16.0 GT/s First Retimer Data Parity Mismatch Status (PL16FRDPMS) | 00000000h |
AB4h | 4 | Physical Layer 16.0 GT/s Second Retimer Data Parity Mismatch Status (PL16SRDPMS) | 00000000h |
AB8h | 4 | 00000000h | |
ABCh | 2 | Physical Layer 16.0 GT/s Lane 01 Equalization Control (PL16L01EC) | 0000h |
ABEh | 2 | Physical Layer 16.0 GT/s Lane 23 Equalization Control (PL16L23EC) | 0000h |
AC0h | 2 | Physical Layer 16.0 GT/s Lane 45 Equalization Control (PL16L45EC) | 0000h |
AC2h | 2 | Physical Layer 16.0 GT/s Lane 67 Equalization Control (PL16L67EC) | 0000h |
AC4h | 2 | Physical Layer 16.0 GT/s Lane 89 Equalization Control (PL16L89EC) | 0000h |
AC6h | 2 | Physical Layer 16.0 GT/s Lane 1011 Equalization Control (PL16L1011EC) | 0000h |
AC8h | 2 | Physical Layer 16.0 GT/s Lane 1213 Equalization Control (PL16L1213EC) | 0000h |
ACAh | 2 | Physical Layer 16.0 GT/s Lane 1415 Equalization Control (PL16L1415EC) | 0000h |
ADCh | 4 | 00000000h | |
AE0h | 4 | 00000000h | |
AE4h | 4 | 00000000h | |
AE8h | 4 | 00000000h | |
AECh | 4 | 00000000h | |
AF0h | 4 | 00000000h | |
AF4h | 4 | 00000000h | |
AF8h | 4 | 00000000h | |
AFCh | 4 | 00000000h | |
B00h | 4 | 00000000h | |
B04h | 4 | 00000000h | |
B08h | 4 | 32.0 GT/s Lane 12131415 Equalization Control (G5LANEEQCTL_12) | 00000000h |
B0Ch | 4 | 00000000h | |
B10h | 4 | 00000000h | |
B14h | 4 | 00000000h | |
B18h | 4 | 00000000h | |
B1Ch | 4 | 00000000h | |
B20h | 4 | 00000000h | |
C00h | 4 | 00000000h | |
C04h | 2 | 0000h | |
C06h | 2 | 0000h | |
C08h | 4 | 00000000h | |
C0Ch | 4 | 00000000h | |
C10h | 4 | 00000000h | |
C18h | 4 | 00000000h | |
C20h | 4 | 00000000h | |
C28h | 4 | 00000000h | |
C2Ch | 4 | 00000000h | |
C70h | 4 | 00000000h | |
C74h | 4 | VNN Removal Save And Restore Hardware Contexts 1 (VNNRSNRC1) | 00000000h |
EDCh | 4 | Physical Layer 16.0 GT/s Margining Extended Capability Header (PL16MECH) | 00000000h |
EE0h | 2 | Physical Layer 16.0 GT/s Margining Port Capabilities and Port Status Byte 0 & 1 (PL16MPCPSB01) | 0000h |
EE2h | 2 | Physical Layer 16.0 GT/s Margining Port Capabilities and Port Status Byte 2 & 3 (PL16MPCPSB23) | 0000h |
EE4h | 4 | Physical Layer 16.0 GT/s Lane0 Margin Control and Status (PL16L0MCS) | 00000000h |
EE8h | 4 | Physical Layer 16.0 GT/s Lane1 Margin Control and Status (PL16L1MCS) | 00000000h |
EECh | 4 | Physical Layer 16.0 GT/s Lane2 Margin Control and Status (PL16L2MCS) | 00000000h |
EF0h | 4 | Physical Layer 16.0 GT/s Lane3 Margin Control and Status (PL16L3MCS) | 00000000h |
EF4h | 4 | Physical Layer 16.0 GT/s Lane4 Margin Control and Status (PL16L4MCS) | 00000000h |
EF8h | 4 | Physical Layer 16.0 GT/s Lane5 Margin Control and Status (PL16L5MCS) | 00000000h |
EFCh | 4 | Physical Layer 16.0 GT/s Lane6 Margin Control and Status (PL16L6MCS) | 00000000h |
F00h | 4 | Physical Layer 16.0 GT/s Lane7 Margin Control and Status (PL16L7MCS) | 00000000h |
F04h | 4 | Physical Layer 16.0 GT/s Lane8 Margin Control and Status (PL16L8MCS) | 00000000h |
F08h | 4 | Physical Layer 16.0 GT/s Lane9 Margin Control and Status (PL16L9MCS) | 00000000h |
F0Ch | 4 | Physical Layer 16.0 GT/s Lane10 Margin Control and Status (PL16L10MCS) | 00000000h |
F10h | 4 | Physical Layer 16.0 GT/s Lane11 Margin Control and Status (PL16L11MCS) | 00000000h |
F14h | 4 | Physical Layer 16.0 GT/s Lane12 Margin Control and Status (PL16L12MCS) | 00000000h |
F18h | 4 | Physical Layer 16.0 GT/s Lane13 Margin Control and Status (PL16L13MCS) | 00000000h |
F1Ch | 4 | Physical Layer 16.0 GT/s Lane14 Margin Control and Status (PL16L14MCS) | 00000000h |
F20h | 4 | Physical Layer 16.0 GT/s Lane15 Margin Control and Status (PL16L15MCS) | 00000000h |