12th Generation Intel® Core™ Processor Datasheet Volume 2 of 2
ID | Date | Version | Classification |
---|---|---|---|
767626 | 07/13/2023 | Public |
D2:F0 Processor Graphics Registers
This chapter documents the registers in Bus 0, Device 2, Function 0.
Offset | Size (Bytes) | Register Name (Register Symbol) | Default Value |
---|---|---|---|
0h | 2 | 0000h | |
2h | 2 | 0000h | |
4h | 2 | 0000h | |
6h | 2 | 0000h | |
8h | 4 | 00000000h | |
Ch | 1 | 00h | |
Dh | 1 | 00h | |
Eh | 1 | 00h | |
Fh | 1 | 00h | |
10h | 4 | Graphics Translation Table Memory Mapped Range Address (GTTMMADR0_0_2_0_PCI) | 00000000h |
14h | 4 | Graphics Translation Table Memory Mapped Range Address (GTTMMADR1_0_2_0_PCI) | 00000000h |
18h | 4 | 00000000h | |
1Ch | 4 | 00000000h | |
20h | 4 | 00000000h | |
2Ch | 2 | 0000h | |
2Eh | 2 | 0000h | |
30h | 4 | 00000000h | |
34h | 1 | 00h | |
3Ch | 1 | 00h | |
3Dh | 1 | 00h | |
3Eh | 1 | 00h | |
3Fh | 1 | 00h | |
40h | 2 | 0000h | |
42h | 2 | 0000h | |
44h | 4 | 00000000h | |
48h | 4 | 00000000h | |
50h | 2 | 0000h | |
54h | 2 | 0000h | |
58h | 1 | 00h | |
60h | 4 | 00000000h | |
68h | 4 | 00000000h | |
6Ch | 1 | 00h | |
70h | 2 | 0000h | |
72h | 2 | 0000h | |
74h | 4 | 00000000h | |
78h | 2 | 0000h | |
7Ah | 2 | 0000h | |
ACh | 2 | Message Signaled Interrupts Capability ID (MSI_CAPID_0_2_0_PCI) | 0000h |
AEh | 2 | 0000h | |
B0h | 4 | 00000000h | |
B4h | 2 | 0000h | |
B8h | 4 | 00000000h | |
BCh | 4 | 00000000h | |
C0h | 4 | 00000000h | |
C4h | 4 | 00000000h | |
C8h | 4 | Graphics VTD Base Address LSB (GFXVTDBAR_LSB_0_2_0_PCI) | 00000000h |
CCh | 4 | 00000000h | |
D0h | 2 | 0000h | |
D2h | 2 | 0000h | |
D4h | 2 | 0000h | |
E0h | 2 | 0000h | |
E4h | 4 | 00000000h | |
E8h | 2 | 0000h | |
F0h | 4 | Device 2 Mirror of Protected Audio Video Path Control (PAVPC0_0_2_0_PCI) | 00000000h |
F4h | 4 | Device 2 Mirror of Protected Audio Video Path Control (PAVPC1_0_2_0_PCI) | 00000000h |
F8h | 4 | 00000000h | |
FCh | 4 | 00000000h | |
100h | 4 | PASID Extended Capability Header (PASID_EXTCAP_0_2_0_PCI) | 00000000h |
104h | 2 | 0000h | |
106h | 2 | 0000h | |
200h | 4 | 00000000h | |
204h | 2 | 0000h | |
206h | 2 | 0000h | |
300h | 4 | Page Request Extended Capability Header (PR_EXTCAP_0_2_0_PCI) | 00000000h |
304h | 2 | 0000h | |
306h | 2 | 0000h | |
308h | 4 | 00000000h | |
30Ch | 4 | 00000000h | |
320h | 4 | SRIOV Extended Capability Header (SRIOV_ECAPHDR_0_2_0_PCI) | 00000000h |
324h | 4 | 00000000h | |
32Ah | 2 | 0000h | |
32Ch | 2 | 0000h | |
32Eh | 2 | 0000h | |
334h | 2 | 0000h | |
336h | 2 | 0000h | |
33Ah | 2 | 0000h | |
33Ch | 4 | 00000000h | |
340h | 4 | 00000000h | |
344h | 4 | 00000000h | |
348h | 4 | 00000000h | |
34Ch | 4 | 00000000h | |
350h | 4 | 00000000h | |
35Ch | 4 | VF Migration State Array Offset (VF_MIGST_OFFSET_0_2_0_PCI) | 00000000h |