31

0x0

RO/V

Translation Enable Status (TES)

This field indicates the status of DMA-remapping hardware.
0: DMA-remapping hardware is not enabled.
1: DMA-remapping hardware is enabled.

30

0x0

RO/V

Root Table Pointer Status (RTPS)

This field indicates the status of the root- table pointer in hardware.
This field is cleared by hardware when software sets the SRTP field in the Global Command register. This field is set by hardware when hardware completes the Set Root Table Pointer operation using the value provided in the Root-Entry Table Address register.

29

0x0

RO

Fault Log Status (FLS)

This field:
Is cleared by hardware when software Sets the SFL field in the Global Command register.
Is Set by hardware when hardware completes the Set Fault Log Pointer operation using the value provided in the Advanced Fault Log register.

28

0x0

RO

Advanced Fault Logging Status (AFLS)

This field is valid only for implementations supporting advanced fault logging. It indicates the advanced fault logging status:
0: Advanced Fault Logging is not enabled.
1: Advanced Fault Logging is enabled.

27

0x0

RO

Write Buffer Flush Status (WBFS)

This field is valid only for implementations requiring write buffer flushing. This field indicates the status of the write buffer flush command. It is:
Set by hardware when software sets the WBF field in the Global Command register.
Cleared by hardware when hardware completes the write buffer flushing operation.

26

0x0

RO/V

Queued Invalidation Enable Status (QIES)

This field indicates queued invalidation enable status.
0: queued invalidation is not enabled.
1: queued invalidation is enabled.

25

0x0

RO/V

Interrupt Remapping Enable Status (IRES)

This field indicates the status of Interrupt-remapping hardware.
0: Interrupt-remapping hardware is not enabled.
1: Interrupt-remapping hardware is enabled.

24

0x0

RO/V

Interrupt Remapping Pointer Status (IRTPS)

This field indicates the status of the interrupt remapping table pointer in hardware.
This field is cleared by hardware when software sets the SIRTP field in the Global Command register. This field is Set by hardware when hardware completes the set interrupt remap table pointer operation using the value provided in the Interrupt Remapping Table Address register.

23

0x0

RO/V

Compatibility Format Interrupt Status (CFIS)

This field indicates the status of Compatibility format interrupts on Intel64 implementations supporting interrupt-remapping. The value reported in this field is applicable only when interrupt-remapping is enabled and Extended Interrupt Mode (x2APIC mode) is not enabled.
0: Compatibility format interrupts are blocked.
1: Compatibility format interrupts are processed as pass-through (bypassing interrupt remapping).

22:0

0h

RO

Reserved