31

0x0

RW/V/L

4096MB Address Mask (ADMSK4096)

This bit is either part of the Memory Base Address (R/W) or part of Address Mask (RO) depending on the value of MSAC.APSZ.RO and forced to 0 when MSAC.APSZ >= 4096MB. (i.e. MSAC.APSZ[4]=1)

30

0x0

RW/V/L

2048MB Address Mask (ADMSK2048)

This bit is either part of the Memory Base Address (R/W) or part of the Address Mask (RO) depending on the value of MSAC.APSZ.RO and forced to 0 when MSAC.APSZ >= 2048MB. (i.e. MSAC.APSZ[3]=1)

29

0x0

RW/V/L

1024MB Address Mask (ADMSK1024)

This bit is either part of the Memory Base Address (R/W) or part of the Address Mask (RO) depending on the value of MSAC.APSZ.RO and forced to 0 when MSAC.APSZ >= 1024MB. (i.e. MSAC.APSZ[2]=1)

28

0x0

RW/V/L

512MB Address Mask (ADMSK512)

This bit is either part of the Memory Base Address (R/W) or part of the Address Mask (RO) depending on the value of MSAC.APSZ.RO and forced to 0 when MSAC.APSZ >= 512MB. (i.e. MSAC.APSZ[1]=1)

27

0x0

RW/V/L

256MB Address Mask (ADMSK256)

This bit is either part of the Memory Base Address (R/W) or part of the Address Mask (RO) depending on the value of MSAC.APSZ.RO and forced to 0 when MSAC.APSZ >= 256MB. (i.e. MSAC.APSZ[0]=1)

26:4

0x0

RO

Address Mask (ADM)

Hardwired to 0s to indicate at least 128MB address range.

3

0x1

RO

Prefetchable Memory (PREFMEM)

Hardwired to 1 to enable prefetching.

2:1

0x2

RO

Memory Type (MEMTYP)

Hardwired to 2h to indicate 64 bit base address.

0

0x0

RO

Memory I/O Space (MIOS)

Hardwired to 0 to indicate memory space.