63:42

0h

RO

Reserved

41:31

0x0

RW

(PCIEXBAR)

This field corresponds to bits 41 to 32 of the base address for PCI Express enhanced configuration space including bus segments. BIOS will program this register resulting in a base address for a contiguous memory address space. The size of the range is defined by bits [3:1] of this register. This Base address shall be assigned on a boundary consistent with the number of buses (defined by the Length field in this register) above TOLUD and still within the 39-bit addressable memory space. The address bits decoded depend on the length of the region defined by this register. The address used to access the PCI Express configuration space for a specific device can be determined as follows:
PCI Express Base Address +Segment Number*256MB+ Bus Number * 1MB + Device Number * 32KB + Function Number * 4KB
This address is the beginning of the 4KB space that contains both the PCI compatible configuration space and the PCI Express extended configuration space.

30

0x0

RW/V

(ADMSK1024)

This bit is either part of the PCI Express Base Address (R/W) or part of the Address Mask (RO, read 0b), depending on the value of bits [3:1] in this register.

29

0x0

RW/V

(ADMSK512)

This bit is either part of the PCI Express Base Address (R/W) or part of the Address Mask (RO, read 0b), depending on the value of bits [3:1] in this register.

28

0x0

RW/V

(ADMSK256)

This bit is either part of the PCI Express Base Address (R/W) or part of the Address Mask (RO, read 0b), depending on the value of bits [3:1] in this register.

27

0x0

RW/V

(ADMSK128)

This bit is either part of the PCI Express Base Address (R/W) or part of the Address Mask (RO, read 0b), depending on the value of bits [3:1] in this register.

26

0x0

RW/V

(ADMSK64)

This bit is either part of the PCI Express Base Address (R/W) or part of the Address Mask (RO, read 0b), depending on the value of bits [3:1] in this register.

25:4

0h

RO

Reserved

3:1

0x0

RW

(Length)

This field describes the length of this region.
000: 256MB (buses 0-255). Bits 38:28 are decoded in the PCI Express Base Address Field.
001: 128MB (buses 0-127). Bits 38:27 are decoded in the PCI Express Base Address Field.
010: 64MB (buses 0-63). Bits 38:26 are decoded in the PCI Express Base Address Field.
011: 512MB (buses 0-512). Bits 38:29 are decoded in the PCI Express Base Address Field.
100: 1024MB (buses 0-1024). Bits 38:30 are decoded in the PCI Express Base Address Field.
101: 2048MB (buses 0-2048). Bits 38:31 are decoded in the PCI Express Base Address Field.
110: 4096MB (buses 0-4096). Bits 38:32 are decoded in the PCI Express Base Address Field.
111:Rreserved.

0

0x0

RW

(PCIEXBAREN)

PCIEX BAR Enable