31

0x0

RW

Enable Protected Memory (EPM)

This field controls DMA accesses to the protected low-memory and protected high-memory regions.
0: Protected memory regions are disabled.
1: Protected memory regions are enabled.DMA requests accessing protected memory regions are handled as follows:

• When DMA remapping is not enabled, all DMA requests accessing protected memory regions are blocked.
  
• When DMA remapping is enabled:
  • DMA requests processed as pass-through (Translation Type value of 10b in Context-Entry) and accessing the protected memory regions are blocked.
    
  • DMA requests with translated address (AT=10b) and accessing the protected memory regions are blocked.
    
  • DMA requests that are subject to address remapping, and accessing the protected memory regions may or may not be blocked by hardware. For such requests, software must not depend on hardware protection of the protected memory regions, and instead program the DMA-remapping page-tables to not allow DMA to protected memory regions.
    Remapping hardware access to the remapping structures are not subject to protected memory region checks.
    DMA requests blocked due to protected memory region violation are not recorded or reported as remapping faults.
    Hardware reports the status of the protected memory enable/disable operation through the PRS field in this register.Hardware implementations supporting DMA draining must drain any in-flight translated DMA requests queued within the Root-Complex before indicating the protected memory region as enabled through the PRS field.
    After writing to this field software must wait for the operation to be completed and reflected in the PRS status field (bit 0) before changing the value of this field again.

30:1

0h

RO

Reserved

0

0x0

RO/V

Protected Region Status (PRS)

This field indicates the status of protected memory region(s):
0: Protected memory region(s) disabled.
1: Protected memory region(s) enabled.