15:9

0h

RO

Reserved

8

0x0

RW/1C/V

Data Link Layer State Changed (DLLSC)

This bit is set when the value reported in Data Link Layer Link Active field of the Link Status register is changed. In response to a Data Link Layer State Changed event, software must read Data Link Layer Link Active field of the Link Status register to determine if the link is active before initiating configuration cycles to the hot plugged device.

7

0x0

RO

Electromechanical Interlock Status (EMIS)

Reserved as this port does not support and electromechanical interlock.

6

0x0

RO/V

Presence Detect State (PDS)

If XCAP.SI is set (indicating that this root port spawns a slot), then this bit indicates whether a device is connected ('1') or empty ('0'). If XCAP.SI is cleared, this bit is a '1'.

5

0x0

RO

MRL Sensor State (MS)

Reserved as the MRL sensor is not implemented.

4

0x0

RO

Command Completed (CC)

This register is RO as this port does not implement a Hot Plug Controller..

3

0x0

RW/1C/V

Presence Detect Changed (PDC)

This bit is set by the root port when the PD bit changes state.

2

0x0

RO

MRL Sensor Changed (MSC)

Reserved as the MRL sensor is not implemented.

1

0x0

RO

Power Fault Detected (PFD)

Reserved as a power controller is not implemented.

0

0x0

RO

Attention Button Pressed (ABP)

This register is RO as this port does not implement an attention button.