Transmitted Modified TS Data 2 (TRNSMODTSDATA2) – Offset AF8
Transmitted Modified TS Data 2
Bit Range | Default | Access | Field Name and Description |
31:26 | 0h | RO | Reserved |
25:24 | 0x0 | RO/V | Alternate Protocol Negotation Status (ALTPROTNEGSTS) Alternate Protocol Negotation Status - Indicates the status of the Apternate Protocol Negotiaiton. Encodings are Alternate Protocol Negotiation not supported - Modified TS Usage Mode 2 Supported - Alternate Protocol is Clear. Alternate Protocol Negotiation disabled - Modified TS Usage Mode 2 Supported - Alternate Protocol is Set but Modified TS Usage Mode Selected was not 2 during the appropriate LTSSM State. Alternate Protocol Negotiation failed - Alternate Protocol Negotiation was attempted and did not locate a protocol that was supported on both ends of the Link. Alternate rotocol Negotiation succeeded - Alternate Protocol Negotiation located one or more protocols that were supported on both ends of the Link and the Downstream Port selected one of those protocols for use. If Set, Alternate Protocol Negotiation completed succesfully. If Clear, alternate protocol negotiation negotiation has not completed succesfully. If Modified TS Usage Mode 1 Supported - Training Set Message and Modified TS Usage Mode 2 Supported - Alternate Protocol are both Clear, this register is permitted to be hardwired to 0000 0000h. If Modified TS Usage Mode 2 Supported - Alternate Protocol is Clear, this bit is hardwired to 0b. If Modified TS Usage Mode Selected does not equal 2, this bit contains 0b. This bit is Cleared on XXX LTSSM State. |
23:0 | 0x0 | RO/V | Transmitted Modified TS Information 2 (TRNSMTSINFO2) If Modified TS Received is Set, this field contains the Modified TS Information 2 field from the last Modified TS1/TS2 Ordered Set transmitted during the most recent LTSSM State. Bits 23:16 contain the value of Symbol 12. Bits 16:8 contain the value of Symbol 13. Bits 7:0 contain the value of Symbol 14. If PCI Express (Usage Mode 0) is the only one supported, this field is permitted to be hardwired to 00 0000h. |