31

0x0

RW/L

Virtual Channel Enable (EN)

Enables the VC when set. Disables the VC when cleared.
This register is Read-Only if LPCR.SRL field is set

30:28

0h

RO

Reserved

27:24

0x0

RW/L

Virtual Channel Identifier (ID)

Indicates the ID to use for this virtual channel
Note: BIOS is required to program VCID[3] to 0 when operating at DMI2.
This register is Read-Only if LPCR.SRL field is set

23:20

0h

RO

Reserved

19:17

0x0

RW

Function Arbitration Select (FAS)

This field configures the VC resource to provide a particular Function Arbitration service.
The permissible value of this field is a number corresponding to one of the asserted bits in the Function Arbitration Capability field of the VC resource.

16

0x0

RW

Load Function Arbitration Table (LFAT)

When Set, this bit updates the Function Arbitration logic from the Function Arbitration Table for the VC resource. This bit is only valid when the Function Arbitration Table is used by the selected Function Arbitration scheme (that is indicated by a Set bit in the Function Arbitration Capability field selected by Function Arbitration Select).
Software sets this bit to signal hardware to update Function Arbitration logic with new values stored in the Function Arbitration Table - clearing this bit has no effect. Software uses the Function Arbitration Table Status bit to confirm whether the new values of Function Arbitration Table are completely latched by the arbitration logic.
This bit always returns 0b when read.
Default value of this bit is 0b.

15:10

0x0

RW/L

Extended TC/VC Map (ETVM)

Defines the upper 8-bits of the VC0 16-bit TC/VC mapping registers. These registers use the PCI Express reserved TC[3] traffic class bit.
This register is Read-Only if LPCR.SRL field is set

9:8

0h

RO

Reserved

7:1

0x0

RW/L

Transaction Class / Virtual Channel Map (TVM)

This field indicates the TCs that are mapped to the VC resource.
Bit locations within this field correspond to TC values. For example, when bit 7 is Set in this field, TC7 is mapped to this VC resource. When more than 1 bit in this field is Set, it indicates that multiple TCs are mapped to the VC resource.
In order to remove one or more TCs from the TC/VC Map of an enabled VC, software must ensure that no new or outstanding transactions with the TC labels are targeted at the given Link.
Default value of this field is FFh for the first VC resource and is 00h for other VC resources.
Note:
Bit 0 of this field is read-only. It must be hardwired to 1b for the
default VC0 and hardwired to 0b for all other enabled VCs.
This register is Read-Only if LPCR.SRL field is set

0

0h

RO

Reserved