13th Generation Intel® Core™ Processors Datasheet, Volume 2 of 2
ID | Date | Version | Classification |
---|---|---|---|
767624 | 07/13/2023 | Public |
Capabilities C (CAPID0_C_0_0_0_PCI) – Offset ec
Processor capability enumeration.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31 | 0b | RW/L | PCIe Controller Device 6 Function 2 Disabled (PEG62D) PCIe Controller Device 6 Function 2 is disabled |
30 | 0b | RW/L | PCIe Controller Device 6 Function 1 Disabled (PEG61D) PCIe Controller Device 6 Function 1 is disabled |
29 | 0b | RW/L | PCIe Gen 5 Disable (PEGG5_DIS) This field will be strap selectable/modifiable to enable PCH Pairing capabilities. |
28 | 0b | RW/L | PCIe Gen 4 Disable (PEGG4_DIS) PCIe Gen 4 Disabled. This field will be strap selectable/modifiable to enable PCH Pairing capabilities. |
27:23 | 00000b | RW/L | Maximum DDR4 Frequency (MAX_DATA_RATE_DDR4) DDR4 Maximum Frequency Capability in 266Mhz units. |
22 | 0b | RW/L | DDR4 Support (DDR4_EN) 0: DDR4 is not supported |
21:17 | 00000b | RW/L | Maximum LPDDR4 Frequency (MAX_DATA_RATE_LPDDR4) LPDDR4 Maximum Frequency Capability in 266Mhz units. |
16 | 0b | RW/L | LPDDR4 Support (LPDDR4_EN) 0: LPDDR4 memory is not supported |
15 | 0h | RO | Reserved |
14 | 0b | RW/L | Dynamic Memory Frequency Change Disable (QCLK_GV_DIS) 0: Dynamic Memory Frequency Change is enabled |
13:10 | 0h | RO | Reserved |
9 | 0b | RW/L | SGX Disabled (SE_DIS) Software Guard Extension (Intel® SGX) Disabled: Indicates that Intel® SGX is not available on this processor |
8:7 | 00b | RW/L | (BCLKOCRANGE) BCLK (Base clock) Overclocking maximum frequency. |
6 | 0b | RW/L | Internal Display Disabled (IDD) Specifies whether the Internal Display is Disabled. |
5 | 0b | RW/L | DISPLAY PIPE3 (DISPLAY_PIPE3) 0: 3rd Display is disabled |
4:0 | 0h | RO | Reserved |