63:56

0h

RO

Reserved

55:40

0h

RO/V

System Agent Voltage (SA_​VOLTAGE)

This register holds the System Agent voltage. This voltage value is valid only if the System Agent VR is SVID based.
The precision is U3.13 (1/8192V resolution).

39:32

20h

RO/V

PSF0 PLL Ratio (PSF0_​RATIO)

Reports the PSF0 PLL ratio.
The PSF0 frequency is: Ratio * 16.67MHz.
The supported ratios are {32, 48, 64} = {533MHz, 800MHz, 1067MHz}.

31:24

0h

RO/V

RING UCLK PLL Ratio (UCLK_​RATIO)

RING UCLK RATIO. Reference=100Mhz

23:18

000000b

RO/V

IPU PS Ratio (IPU_​PS_​RATIO)

The frequency is 25MHz * Ratio.

17:12

000000b

RO/V

IPU IS Divisor (IPU_​IS_​DIVISOR)

The frequency is 1600MHz/Divisor.

11

0b

RO/V

On Package Interface (OPI) Link Speed (OPI_​LINK_​SPEED)

0: 2Gb/s
1: 4Gb/s

10

0b

RO/V

DDR QCLK Reference (QCLK_​REFERENCE)

0: 133.34Mhz. In frequency calculations use 400.0MHz/3.0.
1: 100.00Mhz

9:2

0h

RO/V

DDR QCLK Ratio (QCLK_​RATIO)

Reference determined by the QCLK_​REFERENCE field.

1:0

00b

RO/V

Last Display Engine Workpoint Request Served (LAST_​DE_​WP_​REQ_​SERVED)

Last display engine workpoint request served by the PCU