Intel® Core™ Ultra Processors for H-series and U-series Platforms CFG and MEM Registers
| ID | Date | Version | Classification |
|---|---|---|---|
| 795258 | 07/29/2024 | Public |
Interrupt Remapping Table Address Register (IRTA_REG_0_0_0_VTDBAR) – Offset b8
Register providing the base address of Interrupt remapping table. This register is treated as RsvdZ by implementations reporting Interrupt Remapping (IR) as not supported in the Extended Capability register.
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 63:46 | 0h | RO | Reserved |
| 45:12 | 0h | RW/V | Interrupt Remapping Table Address (IRTA) This field points to the base of 4KB aligned interrupt remapping table. |
| 11 | 0h | RW/V | Extended Interrupt Mode Enable (EIME) This field is used by hardware on Intel64 platforms as follows: |
| 10:4 | 0h | RO | Reserved |
| 3:0 | 0h | RW/V | IRTA Size (S) This field specifies the size of the interrupt remapping table. |