IQ Error Info register (IQERCD_REG_0_0_0_VTDBAR) – Offset b0
Register providing information about Invalidation Queue Error
| Bit Range | Default | Access | Field Name and Description |
| 63:48 | 0h | RO/V/P | Invalidation Completion Error Source Identifier (ICESID) Requester-id associated with Device-TLB invalidation completion that causes an Invalidation Completion Error. If ICE field is Clear at the time of Invalidation Completion Error detection, hardware copies the Requester-id in the Invalidation Completion Message that resulted in the error into this field. This field is valid only when the ICE field is Set in FSTS_REG. The value read from this field is undefined when the ICE field is Clear. |
| 47:32 | 0h | RO/V/P | Invalidation Time-out Error Source Identifier (ITESID) Requester-id associated with Invalidation Time-out Error. If ITE field is Clear at the time of Invalidation Time-out error detection, hardware copies the Requester-id associated with error into this field. If multiple Invalidation Time-out errors are detected at the same time, hardware chooses one of them to be reported. This field is valid only when the ITE field is Set in FSTS_REG. The value read from this field is undefined when the ITE field is Clear. |
| 31:4 | 0h | RO | Reserved |
| 3:0 | 0h | RO/V/P | Invalidation Queue Error Info (IQEI) This field is valid only when the IQE field is set. The value read from this field undefined when the IQE field is clear. This field provides additional details about the what caused IQE field to be Set. 0: info not available. (This is an older version of DMA Remapping hardware which does not provide additional details about IQ errors.) 1: hardware detected an invalid Tail Pointer. 2: hardware attempt to fetch descriptor resulted in error. 3: hardware detected an invalid descriptor type. 4: hardware detected a reserved field violation for a valid descriptor type. 5: hardware detected an invalid descriptor width programmed in the Invalidation Queue Address Register (IQA_REG) descriptor width of 128-bit (IQA_REG.DW=0) when scalable mode is enabled (RTADDR_REG.TTM=01b). Descriptor width of 256-bit (IQA_REG.DW=1) when scalable mode is not supported (ECAP_REG.SMTS=0). 6: hardware detected that Queue Tail is not aligned to the descriptor width (i.e. IQA_REG.DW=1 and IQT.b[4] not equal to 0). 7: hardware detected an invalid value in the TTM field of the Root Table Address (RTADDR_REG) register. 8-15: undefined. |