BIOS Decode Enable (BIOS_SPI_BDE) – Offset d8 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

ID	Date	Version	Classification
834576	10/10/2024	001	Public

BIOS Decode Enable (BIOS_SPI_BDE) – Offset d8

This register only effects BIOS decode if BIOS is resident on SPI.

Bit Range	Default	Access	Field Name and Description
31	0h	RW/L	BDE Lock Enable (BLE) When this bit is set, the RW bits of this BDE register are locked down. Once set, this bit can only be cleared by PLTRST#.
30:16	0h	RO	Reserved (RSVD) Reserved.
15	1h	RO	F8-FF Enable (EF8) Enables decoding of 512K of the following BIOS ranges: FFF80000h - FFFFFFFFh FFB80000h - FFBFFFFFh
14	1h	RW/L	F0-F8 Enable (EF0) Enables decoding of 512K of the following BIOS ranges: FFF00000h - FFF7FFFFh FFB00000h - FFB7FFFFh
13	1h	RW/L	E8-EF Enable (EE8) Enables decoding of 512K of the following BIOS ranges: FFE80000h - FFEFFFFFh FFA80000h - FFAFFFFFh
12	1h	RW/L	E0-E8 Enable (EE0) Enables decoding of 512K of the following BIOS ranges: FFE00000h - FFE7FFFFh FFA00000h - FFA7FFFFh
11	1h	RW/L	D8-DF Enable (ED8) Enables decoding of 512K of the following BIOS ranges: FFD80000h - FFDFFFFFh FF980000h - FF9FFFFFh
10	1h	RW/L	D0-D7 Enable (ED0) Enables decoding of 512K of the following BIOS ranges: FFD00000h - FFD7FFFFh FF900000h - FF97FFFFh
9	1h	RW/L	C8-CF Enable (EC8) Enables decoding of 512K of the following BIOS ranges: FFC80000h - FFCFFFFFh FF880000h - FF8FFFFFh
8	1h	RW/L	C0-C7 Enable (EC0) Enables decoding of 512K of the following BIOS ranges: FFC00000h - FFC7FFFFh FF800000h - FF87FFFFh
7	1h	RW/L	Legacy F Segment Enable (LFE) This enables the decoding of the legacy 64KB range at F0000h - FFFFFh. Note that decode for the BIOS legacy F segment is enabled by the LFE bit only. It is not affected by the GEN_PMCON_1.iA64_EN bit.
6	1h	RW/L	Legacy E Segment Enable (LEE) This enables the decoding of the legacy 64KB range at E0000h - EFFFFh. Note that decode for the BIOS legacy E segment is enabled by the LEE bit only. It is not affected by the GEN_PMCON_1.iA64_EN bit.
5:4	0h	RO	Reserved (RSVD_1) Reserved.
3	1h	RW/L	70-7F Enable (E70) Enables decoding of 1MB of the following BIOS ranges: FF700000h - FF7FFFFFh FF300000h - FF3FFFFFh
2	1h	RW/L	60-6F Enable (E60) Enables decoding of 1MB of the following BIOS ranges: FF600000h - FF6FFFFFh FF200000h - FF2FFFFFh
1	1h	RW/L	50-5F Enable (E50) Enables decoding of 1MB of the following BIOS ranges: FF500000h - FF5FFFFFh FF100000h - FF1FFFFFh
0	1h	RW/L	40-4F Enable (E40) Enables decoding of 1MB of the following BIOS ranges: FF400000h - FF4FFFFFh FF000000h - FF0FFFFFh