Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2
ID | Date | Version | Classification |
---|---|---|---|
834576 | 10/10/2024 | 001 | Public |
BIOS Decode Enable (ESPI_BDE) – Offset d8
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31 | 0h | RW/L | BDE Lock Enable (BLE) When this bit is set, the RW bits of this BDE register are locked down. Once set, this bit can only be cleared by PLTRST#. |
30:16 | 0h | RO | Reserved (RSVD_1) Reserved |
15 | 1h | RO | F8-FF Enable (EF8) Enables decoding of 512K of the following BIOS range: |
14 | 1h | RW/L | F0-F8 Enable (EF0) Enables decoding of 512K of the following BIOS range: |
13 | 1h | RW/L | E8-EF Enable (EE8) Enables decoding of 512K of the following BIOS range: |
12 | 1h | RW/L | E0-E8 Enable (EE0) Enables decoding of 512K of the following BIOS range: |
11 | 1h | RW/L | D8-DF Enable (ED8) Enables decoding of 512K of the following BIOS range: |
10 | 1h | RW/L | D0-D7 Enable (ED0) Enables decoding of 512K of the following BIOS range: |
9 | 1h | RW/L | C8-CF Enable (EC8) Enables decoding of 512K of the following BIOS range: |
8 | 1h | RW/L | C0-C7 Enable (EC0) Enables decoding of 512K of the following BIOS range: |
7 | 1h | RW/L | Legacy F Segment Enable (LFE) This enables the decoding of the legacy 64KB range at F0000h - FFFFFh |
6 | 1h | RW/L | Legacy E Segment Enable (LEE) This enables the decoding of the legacy 64KB range at E0000h - EFFFFh |
5:4 | 0h | RO | Reserved (RSVD) Reserved |
3 | 1h | RW/L | 70-7F Enable (E70) Enables decoding of 1MB of the following BIOS range: |
2 | 1h | RW/L | 60-6F Enable (E60) Enables decoding of 1MB of the following BIOS range: |
1 | 1h | RW/L | 50-5F Enable (E50) Enables decoding of 1MB of the following BIOS range: |
0 | 1h | RW/L | 40-4F Enable (E40) Enables decoding of 1MB of the following BIOS range: |