CORB Read Pointer (CORBRP) – Offset 4a - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

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CORB Read Pointer (CORBRP) – Offset 4a

This register reports the read pointer of the Command Output Ring Buffer.

Bit Range	Default	Access	Field Name and Description
15	0h	RW/V	CORB Read Pointer Reset (CORBRPRST) Software writes a 1 to this bit to reset the CORB Read Pointer to 0 and clear any residual pre-fetched commands in the CORB hardware buffer within the Intel Audio controller. The hardware will physically update this bit to 1 when the CORB Pointer reset is complete. Software must read a 1 to verify that the reset completed correctly. Software must clear this bit back to 0 and read back the 0 to verify that the clear completed correctly. The CORB DMA engine must be stopped prior to resetting the Read Pointer or else DMA transfer may be corrupted.
14:8	0h	RO	Reserved (RSVD2) This is a Reserved Register
7:0	0h	RO/V	CORB Read Pointer (CORBRP) Software reads this field to determine how many commands it can write to the CORB without over-running. The value read indicates the CORB Read Pointer offset in Dword granularity. The offset entry read from this field has been successfully fetched by the DMA controller and may be over-written by software. Supports 256 CORB entries (256 x 4B=1KB). This field may be read while the DMA engine is running.

Bit Range

Default

Access

Field Name and Description

RW/V

CORB Read Pointer Reset (CORBRPRST)

Software writes a 1 to this bit to reset the CORB Read Pointer to 0 and clear any residual pre-fetched commands in the CORB hardware buffer within the Intel Audio controller. The hardware will physically update this bit to 1 when the CORB Pointer reset is complete. Software must read a 1 to verify that the reset completed correctly. Software must clear this bit back to 0 and read back the 0 to verify that the clear completed correctly. The CORB DMA engine must be stopped prior to resetting the Read Pointer or else DMA transfer may be corrupted.

14:8

Reserved (RSVD2)

This is a Reserved Register

7:0

RO/V

CORB Read Pointer (CORBRP)

Software reads this field to determine how many commands it can write to the CORB without over-running. The value read indicates the CORB Read Pointer offset in Dword granularity. The offset entry read from this field has been successfully fetched by the DMA controller and may be over-written by software. Supports 256 CORB entries (256 x 4B=1KB). This field may be read while the DMA engine is running.

CORB Control (CORBCTL)

CORB Write Pointer (CORBWP) CORB Control (CORBCTL)