DAP USB 2.0 Port <N> Control 0 (DAP_USB2_PORT_CONTROL_0_REG_0_MMIO) – Offset 89c4 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

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USB MMIO
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xDCI MMIO Device
xDCI MMIO Global
xDCI PCI Configuration

DAP USB 2.0 Port <N> Control 0 (DAP_USB2_PORT_CONTROL_0_REG_0_MMIO) – Offset 89c4

Control and status registers for all DRD USB2 links.
All bits in this register must be in the Always ON Power domain (un-gated SUS or AON as appropriate).
The register applies to individual port. The offset of each port is 0x89C4 + N*0x10.
For example:
Port 0 offset: 0x89C4
Port 1 offset: 0x89D4
Port 3 offset: 0x89E4
...

Bit Range	Default	Access	Field Name and Description
31:9	0h	RO	Reserved (RSVD1) Hardwired to 0.
8	0h	RW	SW VBus (SW_VBUS) SW sets this bit to 1 to inform xDCI of VBus presence. SW clears this bit to 0 to inform xDCI of VBus absence. VBus present in addition to link port in device state will arm the xDCI to communicate through USB interface.
7:5	1h	RW	Connector Event (CONNECTOR_EVENT) HW loads this field upon availability of connector type soft-strap. Value loaded depends on connector type as specified below: Type C: 001 Type A: 000 SW programs this field to inform HW of the connector event associated with the link port. In Type C, SW may program this field to any defined value. One necessary condition to enable device subscription is that SW programs this field to 11. Additionally, SW VBus must be set to 1 as well before the xDCI is armed to communicate through USB interface. SW is required to poll the Operation State field in the corresponding Port Status register to ensure that HW act on the connector event. Encodings are defined as follows: 000: host subscription 001: un-subscription. (HW default before connector type soft-strap takes effect) 011: device subscription 100: DBC subscription Others: Reserved
4:0	0h	RO	Reserved (RSVD2) Hardwired to 0.

DAP USB 2.0 Port <N> Control 1 (DAP_USB2_PORT_CONTROL_1_REG_0_MMIO)

Message Signaled Interrupt Message Data (MSI_MD_MMIO) DAP USB 2.0 Port <N> Control 1 (DAP_USB2_PORT_CONTROL_1_REG_0_MMIO)