Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2
| ID | Date | Version | Classification |
|---|---|---|---|
| 834576 | 10/10/2024 | 001 | Public |
GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_0) – Offset 260
Refer to Register Field for detail
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 31:15 | 0h | RO | Reserved (RSVD_0) Reserved |
| 14 | 0h | RO | Reserved |
| 13 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_13) Same description as bit 0. |
| 12 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_12) Same description as bit 0. |
| 11 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_11) Same description as bit 0. |
| 10 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_10) Same description as bit 0. |
| 9 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_9) Same description as bit 0. |
| 8 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_8) Same description as bit 0. |
| 7 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_7) Same description as bit 0. |
| 6 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_6) Same description as bit 0. |
| 5 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_5) Same description as bit 0. |
| 4 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_4) Same description as bit 0. |
| 3 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_3) Same description as bit 0. |
| 2 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_2) Same description as bit 0. |
| 1 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_1) This bit is used to enable/disable the generation of GPE to cause SCI and/or wake when the corresponding GPI_GPE_STS[i] bit is set. 0 = disable GPE generation 1 = enable GPE generation Note: The pad must also be routed for GPE functionality in order for GPE to be generated, i.e. the corresponding GPIRoutSCI must be set to '1'. Bit assignment: Bit0 = Pad0 Bit1 = Pad1 Bit2 = Pad2 ... Bit N-1= Pad N-1 \t\t\t |
| 0 | 0h | RW | GPI General Purpose Events Enable (GPI_GPE_EN_GPP_A_0) This bit is used to enable/disable the generation of GPE to cause SCI and/or wake when the corresponding GPI_GPE_STS bit is set. |