Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2
ID | Date | Version | Classification |
---|---|---|---|
834576 | 10/10/2024 | 001 | Public |
HSIO Power Management Configuration Reg 2 (MODPHY_PM_CFG2) – Offset 10c4
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:12 | 0h | RO | Reserved |
11:0 | fffh | RW | ModPHY Lane Sx SUS Well Power Gating Policy [11:0] (MLSXSWPGP) This is a bit per lane that controls SUS Well Power Gating for a ModPHY lane when system is in Sx. |