IDE-Redirect (IDE-R) PCI Configuration Registers

Introduction
CNVi WiFi* PCI Configuration
eSPI PCI Configuration
eSPI PCR
GPIO Commumity 0
GPIO Commumity 1
GPIO Commumity 2
GPIO Commumity 3
GPIO Commumity 4
GPIO Commumity 5
GSPI Additional MMIO
GSPI DMA
GSPI MMIO
GSPI PCI Configuration
I2C Additional MMIO
I2C DMA
I2C MMIO
I3C / I2C / UART / GSPI PCR
I3C Additional MMIO
I3C DMA
I3C MMIO
I3C PCI Configuration
IDE-Redirect (IDE-R) PCI Configuration
Integrated GbE PCI Configuration
Integrated Sensor Hub (ISH) MMIO
Integrated Sensor Hub (ISH) PCI Configuration
Intel(R) Management Engine Interface (MEI) MMIO
Intel(R) Management Engine Interface (MEI) PCI Configuration
Intel® High Definition Audio MMIO
Intel® High Definition Audio PCI Configuration
Intergrated GbE MMIO
Keyboard and Text (KT) PCI Configuration
P2SB PCI Configuration
PCIe* PCI Configuration
PMC I/O Based
PMC MMIO
PMC PCI Configuration
PMC SSRAM PCI Configuration
RTC Index
RTC PCR
SATA ABAR
SATA AIDPBA
- AHCI Index Register (INDEX)
- AHCI Data Register (DATA)
SATA Initialization (SIR) Index
SATA MXPBA
- MSI-X Pending Bit Array QW 0 (MXPQW0_DW0)
- MSI-X Pending Bit Array QW 1 (MXPQW0_DW1)
SATA MXTBA
SATA PCI Configuration
SATA Port 0 ABAR
SATA Port 1 ABAR
SATA Port 2 ABAR
SATA Port 3 ABAR
SATA Port 4 ABAR
SATA Port 5 ABAR
SATA Port 6 ABAR
SATA Port 7 ABAR
SMBus MMIO and I/O
SMBus PCI Configuration
SMBus PCR
SMBus TCO I/O
SPI MMIO
SPI PCI Configuration
THC MMIO Common
- Device Idle Control Register (THC_M_CMN_DEVIDLECTRL)
- THC LTR Control Register (THC_M_CMN_LTR_CTRL)
THC MMIO Port
THC PCI Configuration
UART Additional MMIO
UART DMA
UART MMIO
UART PCI Configuration
USB MMIO
USB PCI Configuration
xDCI MMIO Device
xDCI MMIO Global
xDCI PCI Configuration

The following registers are at Device 22:Function 2.

Summary of Bus: (128), Device: (22), Function: (), Type: (CFG)

Offset	Size (Bytes)	Register Name (Register Symbol)	Scope	Default Value
0h	4	Device ID And Vendor ID (IDE_HOST_DID_VID)	Package	XXXX8086h
4h	4	Status And Command (IDE_HOST_STS_CMD)	Package	00B00000h
8h	4	Class Code And Revision ID (IDE_HOST_CC_RID)	Package	010185XXh
ch	4	BIST, Header Type, Latency Timer, And Cache Line Size (IDE_HOST_BIST_HTYPE_LT_CLS)	Package	00800000h
10h	4	IDE Primary Command Block IO BAR (IDE_HOST_PCMDIOBAR)	Package	00000001h
14h	4	IDE Primary Control Block IO BAR (IDE_HOST_PCTLIOBAR)	Package	00000001h
18h	4	IDE Secondary Command Block IO BAR (IDE_HOST_SCMDIOBAR)	Package	00000001h
1ch	4	IDE Secondary Control Block IO BAR (IDE_HOST_SCTLIOBAR)	Package	00000001h
20h	4	IDE Bus Master Block IO BAR (IDE_HOST_BMIOBAR)	Package	00000001h
28h	4	Cardbus CIS Pointer (IDE_HOST_CCP)	Package	00000000h
2ch	4	Subsystem ID And Subsystem Vendor ID (IDE_HOST_SID_SVID)	Package	00008086h
30h	4	Expansion ROM Base Address (IDE_HOST_XRBAR)	Package	00000000h
34h	4	Capabilities List Pointer (IDE_HOST_CAPP)	Package	00000040h
3ch	4	Maximum Latency, Minimum Grant, Interrupt Pin And Interrupt Line (IDE_HOST_MAXL_MING_INTP_INTL)	Package	00000000h
40h	4	MSI Message Control, Next Pointer And Capability ID (IDE_HOST_MSIMC_MSINP_MSICID)	Package	00805005h
44h	4	MSI Message Address (IDE_HOST_MSIMA)	Package	00000000h
48h	4	MSI Message Upper Address (IDE_HOST_MSIMUA)	Package	00000000h
4ch	4	MSI Message Data (IDE_HOST_MSIMD)	Package	00000000h
50h	4	Power Management Capabilities, Next Pointer And Capability ID (IDE_HOST_PMCAP_PMNP_PMCID)	Package	00230001h
54h	4	Power Management Data, Control/Status Register Bridge Support Extensions, Control And Status (IDE_HOST_PMD_PMCSRBSE_PMCSR)	Package	00000008h

Device ID And Vendor ID (IDE_HOST_DID_VID)

General Purpose Input Register (GEN_INPUT_REG) Device ID And Vendor ID (IDE_HOST_DID_VID)

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Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

IDE-Redirect (IDE-R) PCI Configuration Registers

Summary of Bus: (128), Device: (22), Function: (), Type: (CFG)