Latency Limit Control (LATENCY_LIMIT_CONTROL) – Offset 1940 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

ID	Date	Version	Classification
834576	10/10/2024	001	Public

Latency Limit Control (LATENCY_LIMIT_CONTROL) – Offset 1940

Bit Range	Default	Access	Field Name and Description
31:23	0h	RO	Reserved
22	0h	RW	CTR2_ENABLE (CTR2_ENABLE) Control for counting only if EA=0 0 Count always (EA=0 or 1) 1 Count only if in a state where EA=0
21	0h	RW	CTR2_EA_CTL (CTR2_EA_CTL) Control for counting only if EA=0 0 Count always (EA=0 or 1) 1 Count only if in a state where EA=0
20:16	0h	RW	CTR2_DEVICE (CTR2_DEVICE) Encoding of the LTR device to be monitored 0 - SPA 1 - SPB 2 - SPC 3 - SATA 4 - GBE 5 - XHCI 6 - ME 7 - SATA1 8 - AZ 9 - ESPI 10 - LPSS 11 - SPD 12 - SPE (Reserved for LP) 13 - SATA2 (Reserved for LP) 14 - SDX 15 - ISH 16 - CNVI 17 - EMMC 18 - UFSX2 19 - WIGIG 20 - THC0 21 - THC1 22 - SPF 23 - SPG \t\t\t\t\t 24 - IOE_PMC \t\t\t\t\t 25 - DMI3 \t\t\t\t\t 26 - ESE 27 - PMC_FW
15	0h	RO	Reserved
14	0h	RW	CTR1_ENABLE (CTR1_ENABLE) Control for counting only if EA=0 0 Count always (EA=0 or 1) 1 Count only if in a state where EA=0
13	0h	RW	CTR1_EA_CTL (CTR1_EA_CTL) Control for counting only if EA=0 0 Count always (EA=0 or 1) 1 Count only if in a state where EA=0
12:8	0h	RW	CTR1_DEVICE (CTR1_DEVICE) Encoding of the LTR device to be monitored 0 - SPA 1 - SPB 2 - SPC 3 - SATA 4 - GBE 5 - XHCI 6 - ME 7 - SATA1 8 - AZ 9 - ESPI 10 - LPSS 11 - SPD 12 - SPE (Reserved for LP) 13 - SATA2 (Reserved for LP) 14 - SDX 15 - ISH 16 - CNVI 17 - EMMC 18 - UFSX2 19 - WIGIG 20 - THC0 21 - THC1 22 - SPF 23 - SPG \t\t\t\t\t 24 - IOE_PMC \t\t\t\t\t 25 - DMI3 \t\t\t\t\t 26 - ESE 27 - PMC_FW
7	0h	RO	Reserved
6	0h	RW	CTR0_ENABLE (CTR0_ENABLE) Control for counting only if EA=0 0 Count always (EA=0 or 1) 1 Count only if in a state where EA=0
5	0h	RW	CTR0_EA_CTL (CTR0_EA_CTL) Control for counting only if EA=0 0 Count always (EA=0 or 1) 1 Count only if in a state where EA=0
4:0	0h	RW	CTR0_DEVICE (CTR0_DEVICE) Encoding of the LTR device to be monitored 0 - SPA 1 - SPB 2 - SPC 3 - SATA 4 - GBE 5 - XHCI 6 - ME 7 - SATA1 8 - AZ 9 - ESPI 10 - LPSS 11 - SPD 12 - SPE (Reserved for LP) 13 - SATA2 (Reserved for LP) 14 - SDX 15 - ISH 16 - CNVI 17 - EMMC 18 - UFSX2 19 - WIGIG 20 - THC0 21 - THC1 22 - SPF 23 - SPG \t\t\t\t\t 24 - IOE_PMC \t\t\t\t\t 25 - DMI3 \t\t\t\t\t 26 - ESE 27 - PMC_FW