Miscellaneous Configuration (MISCCFG) – Offset 10 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

ID	Date	Version	Classification
834576	10/10/2024	001	Public

Miscellaneous Configuration (MISCCFG) – Offset 10

Refer to Register Field for detail

Bit Range	Default	Access	Field Name and Description
31:24	34h	RW	GPIO Driver Mode Interrupt Select (GPDMINTSEL) IRQ globally for all pads (GPI_IS with corresponding GPI_IE enable). 0 = Interrupt Line 0 1 = Interrupt Line 1 ... 255 = Interrupt Line 255
23:20	0h	RO	Reserved
19:16	4h	RW	GPIO Group to GPE_DW2 assignment encoding (GPE0_DW2) This register assigns a specific GPIO Group to the ACPI GPE0[95:64]. 0000 = GPP_D 0001 = GPP_R 0010 = GPP_J 0011 = VGPIO 0100 = GPD 0101 = GPP_I 0110 = GPP_S 0111 = GPP_E 1000 = GPP_K 1001 = GPP_F 1010 = GPP_H 1011 = GPP_C 1100 = GPP_A 1101 = Reserved 1110 = GPP_B 1111 = Reserved
15:12	3h	RW	GPIO Group to GPE_DW1 assignment encoding (GPE0_DW1) This register assigns a specific GPIO Group to the ACPI GPE0[63:32]. 0000 = GPP_D 0001 = GPP_R 0010 = GPP_J 0011 = VGPIO 0100 = GPD 0101 = GPP_I 0110 = GPP_S 0111 = GPP_E 1000 = GPP_K 1001 = GPP_F 1010 = GPP_H 1011 = GPP_C 1100 = GPP_A 1101 = Reserved 1110 = GPP_B 1111 = Reserved
11:8	2h	RW	GPIO Group to GPE_DW0 assignment encoding (GPE0_DW0) This register assigns a specific GPIO Group to the ACPI GPE0[31:0]. 0000 = GPP_D 0001 = GPP_R 0010 = GPP_J 0011 = VGPIO 0100 = GPD 0101 = GPP_I 0110 = GPP_S 0111 = GPP_E 1000 = GPP_K 1001 = GPP_F 1010 = GPP_H 1011 = GPP_C 1100 = GPP_A 1101 = Reserved 1110 = GPP_B 1111 = Reserved
7:2	0h	RO	Reserved
1	0h	RW	GPIO Dynamic Partition Clock Gating Enable (GPDPCGEN) Specify whether the GPIO Community should take part in partition clock gating. 0 = Disable participation in dynamic partition clock gating 1 = Enable participation in dynamic partition clock gating
0	0h	RW	GPIO Dynamic Local Clock Gating Enable (GPDLCGEN) Specify whether the GPIO Community should perform local clock gating. 0 = Disable dynamic local clock gating 1 = Enable dynamic local clock gating