Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2
ID | Date | Version | Classification |
---|---|---|---|
834576 | 10/10/2024 | 001 | Public |
Pad Ownership (PAD_OWN_DSW_0) – Offset b0
Refer to Register Field for detail
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:30 | 0h | RO | Reserved (RSVD_0) Reserved |
29:28 | 0h | RW | Pad Ownership (PAD_OWN_GPD_7) Same description as bits [1:0]. |
27:26 | 0h | RO | Reserved (RSVD_1) Reserved |
25:24 | 0h | RW | Pad Ownership (PAD_OWN_GPD_6) Same description as bits [1:0]. |
23:22 | 0h | RO | Reserved (RSVD_2) Reserved |
21:20 | 0h | RW | Pad Ownership (PAD_OWN_GPD_5) Same description as bits [1:0]. |
19:18 | 0h | RO | Reserved (RSVD_3) Reserved |
17:16 | 0h | RW | Pad Ownership (PAD_OWN_GPD_4) Same description as bits [1:0]. |
15:14 | 0h | RO | Reserved (RSVD_4) Reserved |
13:12 | 0h | RW | Pad Ownership (PAD_OWN_GPD_3) Same description as bits [1:0]. |
11:10 | 0h | RO | Reserved (RSVD_5) Reserved |
9:8 | 0h | RW | Pad Ownership (PAD_OWN_GPD_2) This register can be written by CSME GPIO Function** only. Write access without CSME GPIO Function SAI shall be dropped. There is no SAI restriction on register read. Status update: GPIO input event notification (if enabled) to embedded system owner via IOSF-SB Virtual Wire message, or Host SMI (if implemented), NMI (if implemented), SCI/GPE or GPI_INT status update All subsequent read/write accesses to the corresponding pad's Pad Configuration Register are verified with the owner's GPIO Function SAI. PAD_OWN[1:0] encoding: '00' = Host GPIO ACPI Mode or GPIO Driver Mode. Host software (ACPI or GPIO Driver) has ownership of the pad. In Host GPIO Driver Mode (refer to HOSTSW_OWN), GPIO input event update is limited to GPI_STS update only. Otherwise in Host ACPI Mode, updates are limited to GPI_GPE_STS, GPI_NMI_STS and/or GPI_SMI_STS. No read/write restriction to the Pad Configuration register set during host ownership. During host ownership, CSME, IE and ISH do not own this pad and are not notified of the GPIO input event. '01' = CSME GPIO Mode. CSME has ownership of the pad. All accesses to Pad Configuration register set must be verified with CSME GPIO Function SAI **. Non-posted cycle access without CSME SAI shall result into nsuccessful Completionstatus. Posted cycle access without CSME SAI shall be dropped. In CSME GPIO Mode, the host related status registers related to the pad (refer to host ownership above) are masked from being updated by GPIO input event. If IOSF-SB Virtual Wire message generation is enabled for this pad, GPIO hardware sends the Virtual Wire message to CSME GPIO Function. Only CSME GPIO Function is notified of the GPIO input event. '10' = ISH GPIO Mode. Same description as CSME GPIO Mode above except verifying ISH GPIO Function SAI for pad related register accesses and the Virtual Wire message is delivered to the ISH GPIO Function. '11' = IE GPIO Mode. Same description as CSME GPIO Mode above except verifying IE GPIO Function SAI for pad related register accesses and the Virtual Wire message is delivered to the ISH GPIO Function. All other values are reserved. Implementation shall treat reserved values the same as 0h. ** During DFx mode, Secure DFx can write to the PAD_OWN. \t\t\t |
7:6 | 0h | RO | Reserved (RSVD_6) Reserved |
5:4 | 0h | RW | Pad Ownership (PAD_OWN_GPD_1) This register can be written by CSME GPIO Function** only. Write access without CSME GPIO Function SAI shall be dropped. There is no SAI restriction on register read. Status update: GPIO input event notification (if enabled) to embedded system owner via IOSF-SB Virtual Wire message, or Host SMI (if implemented), NMI (if implemented), SCI/GPE or GPI_INT status update All subsequent read/write accesses to the corresponding pad's Pad Configuration Register are verified with the owner's GPIO Function SAI. PAD_OWN[1:0] encoding: '00' = Host GPIO ACPI Mode or GPIO Driver Mode. Host software (ACPI or GPIO Driver) has ownership of the pad. In Host GPIO Driver Mode (refer to HOSTSW_OWN), GPIO input event update is limited to GPI_STS update only. Otherwise in Host ACPI Mode, updates are limited to GPI_GPE_STS, GPI_NMI_STS and/or GPI_SMI_STS. No read/write restriction to the Pad Configuration register set during host ownership. During host ownership, CSME, IE and ISH do not own this pad and are not notified of the GPIO input event. '01' = CSME GPIO Mode. CSME has ownership of the pad. All accesses to Pad Configuration register set must be verified with CSME GPIO Function SAI **. Non-posted cycle access without CSME SAI shall result into nsuccessful Completionstatus. Posted cycle access without CSME SAI shall be dropped. In CSME GPIO Mode, the host related status registers related to the pad (refer to host ownership above) are masked from being updated by GPIO input event. If IOSF-SB Virtual Wire message generation is enabled for this pad, GPIO hardware sends the Virtual Wire message to CSME GPIO Function. Only CSME GPIO Function is notified of the GPIO input event. '10' = ISH GPIO Mode. Same description as CSME GPIO Mode above except verifying ISH GPIO Function SAI for pad related register accesses and the Virtual Wire message is delivered to the ISH GPIO Function. '11' = IE GPIO Mode. Same description as CSME GPIO Mode above except verifying IE GPIO Function SAI for pad related register accesses and the Virtual Wire message is delivered to the ISH GPIO Function. All other values are reserved. Implementation shall treat reserved values the same as 0h. ** During DFx mode, Secure DFx can write to the PAD_OWN. \t\t\t |
3:2 | 0h | RO | Reserved (RSVD_7) Reserved |
1:0 | 0h | RW | Pad Ownership (PAD_OWN_GPD_0) 00 = Host GPIO ACPI Mode or GPIO Driver Mode. Host software (ACPI or GPIO Driver) has ownership of the pad. In Host GPIO Driver Mode (refer to HOSTSW_OWN), GPIO input event update is limited to GPI_STS update only. Otherwise in Host ACPI Mode, updates are limited to GPI_GPE_STS, GPI_NMI_STS and/or GPI_SMI_STS. No read/write restriction to the Pad Configuration register set during host ownership During host ownership, CSME and ISH do not own this pad and are not notified of the GPIO input event. |