SMI Status (GPI_SMI_STS_GPP_D_0) – Offset 280 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

ID	Date	Version	Classification
834576	10/10/2024	001	Public

SMI Status (GPI_SMI_STS_GPP_D_0) – Offset 280

Bit Range	Default	Access	Field Name and Description
31:5	0h	RO	Reserved
4	0h	RW/1C/V	GPI SMI Status (GPI_SMI_STS_GPP_D_4) Same description as bit 0.
3	0h	RW/1C/V	GPI SMI Status (GPI_SMI_STS_GPP_D_3) Same description as bit 0.
2	0h	RW/1C/V	GPI SMI Status (GPI_SMI_STS_GPP_D_2) This bit is set to '1' by hardware when a level event (See RxEdCfg, RxInv) is detected, and all the following conditions are true: The corresponding pad is used in GPIO input mode (PMode) The corresponding PAD_OWN[2:0] is '000' (i.e. ACPI GPIO Mode). If the following conditions are true, then an SMI will be generated if the GPI_SMI_STS bit is set: 1. The corresponding bit in the GPI_SMI_EN register is set 2. The corresponding pad's GPIROUTSMI is set Writing a value of '1' will clear the bit while writing a value of '0' has no effect. 0 = There is no SMI event 1 = There is an SMI event The state of GPI_SMI_EN[x] does not prevent the setting of GPI_SMI_STS[x]. Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 Defaults for these bits are dependent on the state of the GPI pads. \t\t\t
1	0h	RW/1C/V	GPI SMI Status (GPI_SMI_STS_GPP_D_1) Same description as bit 0.
0	0h	RW/1C/V	GPI SMI Status (GPI_SMI_STS_GPP_D_0) This bit is set to '1' by hardware when a level event (See RxEdCfg, RxInv) is detected, and all the following conditions are true: - The corresponding pad is used in GPIO input mode (PMode). - The corresponding PAD_OWN[2:0] is '000' (i.e. ACPI GPIO Mode). If the following conditions are true, then an SMI will be generated if the GPI_SMI_STS bit is set: 1. The corresponding bit in the GPI_SMI_EN register is set 2. The corresponding pad's GPIROUTSMI is set Writing a value of '1' will clear the bit while writing a value of '0' has no effect. 0 = There is no SMI event 1 = There is an SMI event The state of GPI_SMI_EN does not prevent the setting of GPI_SMI_STS.