Squelch Circuit Disable (PTM1) – Offset 80 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

ID	Date	Version	Classification
834576	10/10/2024	001	Public

Squelch Circuit Disable (PTM1) – Offset 80

Bit Range	Default	Access	Field Name and Description
31:24	0h	RO	RSVD0 (RSVD0) Reserved
23	0h	RW	Port 7 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P7SQOFFIDLED) Same as bit[16], except this is for Port 7. This bit is only applicable to project(s) that have port 7 physically.
22	0h	RW	Port 6 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P6SQOFFIDLED) Same as bit[16], except this is for Port 6. This bit is only applicable to project(s) that have port 6 physically.
21	0h	RW	Port 5 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P5SQOFFIDLED) Same as bit[16], except this is for Port 5. This bit is only applicable to project(s) that have port 5 physically.
20	0h	RW	Port 4 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P4SQOFFIDLED) Same as bit[16], except this is for Port 4. This bit is only applicable to project(s) that have port 4 physically.
19	0h	RW	Port 3 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P3SQOFFIDLED) Same as bit[16], except this is for Port 3. This bit is only applicable to project(s) that have port 3 physically.
18	0h	RW	Port 2 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P2SQOFFIDLED) Same as bit[16], except this is for Port 2. This bit is only applicable to project(s) that have port 2 physically.
17	0h	RW	Port 1 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P1SQOFFIDLED) Same as bit[16], except this is for Port 1. This bit is only applicable to project(s) that have port 1 physically.
16	0h	RW	Port 0 Squelch Circuit Off During AHCI Slumber Idle Mechanism Disable (P0SQOFFIDLED) When P0SQOFFIDLED=1, port 0 Squelch Circuit is disabled with interface in Slumber state and no AHCI command outstanding. This feature is only applicable if GHC.AE=1. With the squelch circuit disabled, device initiated wake from Slumber is not supported. BIOS may enable this feature if the DEVSLP feature is not supported on this port. This feature shall be mutually exclusive with the DEVSLP feature.
15:8	0h	RO	RSVD1 (RSVD1) Reserved
7:0	0h	RO	Reserved