Timed GPIO Comparator Value 63:32 (TGPIOCOMPV1_63_32) – Offset 1324 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

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Timed GPIO Comparator Value 63:32 (TGPIOCOMPV1_63_32) – Offset 1324

Bit Range	Default	Access	Field Name and Description
31:0	0h	RW/V	Comparator Value (COMPV) This register is only applicable when Timed GPIO is configured as an output. If periodic mode is not enabled, when ART equals the value last written to this register, the Timed GPIO event is generated. The value in this register does not change. If periodic mode is enabled, when ART equals the value last written to this register, the Timed GPIO event is generated. When this occurs, the value in this register is increased by the value in the Periodic Interval register. For example, in periodic mode if the value written to this register is 00000100h, and Periodic Interval register has the value of 200h. 1. A Timed GPIO event will be generated when ART reaches 00000100h. 2. The value in this register will then be adjusted by the hardware to 00000300h. 3. Another Timed GPIO event will be generated when the ART reaches 00000300h. 4. The value in this register will then be adjusted by the hardware to 00000500h As such when periodic Timed GPIO event occurs, the value in this register will increment. Note: Given that 64 bit values are in two registers, SW needs to account for roll over possibility

Bit Range

Default

Access

Field Name and Description

31:0

RW/V

Comparator Value (COMPV)

This register is only applicable when Timed GPIO is configured as an output.
If periodic mode is not enabled, when ART equals the value last written to this register, the Timed GPIO event is generated. The value in this register does not change.
If periodic mode is enabled, when ART equals the value last written to this register, the Timed GPIO event is generated. When this occurs, the value in this register is increased by the value in the Periodic Interval register.
For example, in periodic mode if the value written to this register is 00000100h, and Periodic Interval register has the value of 200h.
1. A Timed GPIO event will be generated when ART reaches 00000100h.
2. The value in this register will then be adjusted by the hardware to 00000300h.
3. Another Timed GPIO event will be generated when the ART reaches 00000300h.
4. The value in this register will then be adjusted by the hardware to 00000500h
As such when periodic Timed GPIO event occurs, the value in this register will increment.
Note: Given that 64 bit values are in two registers, SW needs to account for roll over possibility

Timed GPIO1 Periodic Interval Value 31_0 (TGPIOPIV1_31_0)

Timed GPIO 1 Comparator Value 31:0 (TGPIOCOMPV1_31_0) Timed GPIO1 Periodic Interval Value 31_0 (TGPIOPIV1_31_0)