Virtual Wire Channel Error for eSPI First Device (VWERR_SLV0) – Offset 4030 - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

ID	Date	Version	Classification
834576	10/10/2024	001	Public

Virtual Wire Channel Error for eSPI First Device (VWERR_SLV0) – Offset 4030

This register is used to control error reporting for the eSPI Virtual Wire Channel

Bit Range	Default	Access	Field Name and Description
31:29	0h	RO	Reserved (RSVD) Reserved
28	0h	RW/L	HOST_C10, NMIOUT# and SMIOUT# (Virtual Wires) to Device Enable Lock (VWNSMIEL) 1'b0: VWHC10OE(if present), VMNMIOE, VWSMIOEi, and VWNSMIEL fields are not locked (writeable by SW) 1'b1: VWHC10OE(if present), VMNMIOE, VWSMIOE, and VWNSMIEL fields are locked This bit can be cleared only upon assertion of eSPI_Reset#. This field is supported for server platforms only.
27	0h	RW/L	NMIOUT (Virtual Wire) to Device Enable (VWNMIOE) 1'b0: Disable NMIOUT# reporting (NMI#_Sent indication from ITSS is ignored) 1'b1: Enable NMIOUT# reporting to device via eSPI Virtual Wire (upon receiving a NMI#_Sent indication from ITSS) This field is supported for server platforms only. This bit is locked when VWNSMIEL = 1.
26	0h	RW/L	MIOUT (Virtual Wire) to Device Enable (VWSMIOE) 1'b0: Disable SMIOUT# reporting (SMI#_Sent indication from PMC is ignored) 1'b1: Enable SMIOUT# reporting to device via eSPI Virtual Wire (upon receiving a SMI#_Sent indication from PMC) This field is supported for server platforms only. This bit is locked when VWNSMIEL = 1.
25	0h	RW/L	HOST_C10 (Virtual Wire) to Device Enable (VWHC10OE) 1'b0: Disable HOST_C10 reporting (HOST_C10 indication from PMC is ignored) 1'b1: Enable HOST_C10 reporting to device via eSPI Virtual Wire (upon receiving a HOST_C10 indication from PMC) This field is supported for server platforms only. This bit is locked when VWNSMIEL = 1.
24:17	0h	RO	Reserved 1 (RSVD1) Reserved
16	0h	RO	Reserved 2 (RSVD2) Reserved
15	0h	RO	Reserved 3 (RSVD3) Reserved
14:13	0h	RW	Virtual Wire Channel Non-Fatal Error Reporting Enable (VWNFEE) 2'b00: Disable Non-Fatal Error Reporting 2'b01: Reserved 2'b10: Enable Non-Fatal Error Reporting as SERR (IOSF-SB Do_SErr message) 2'b11: Enable Non-Fatal Error Reporting as SMI (IOSF-SB Assert_SMI message) SERR enable is also qualified by PCCMD.SEE (Offset 04h) when PLTRST# is deasserted. SERR also sets PCSTS.SSE (Offset 06h) when PLTRST# is deasserted. SMI/SERR messages are not generated if the Host is in reset (PLTRST# asserted).
12	0h	RW/1C/V	Virtual Wire Channel Non-Fatal Error Status (VWNFES) This field is set by hardware if a Non-Fatal Error condition is detected on the Virtual Wire Channel. Software must clear this bit. 1'b0: No Non-Fatal Error detected 1'b1: Non-Fatal Error detected (VWNFEC has a non-zero value) Clearing this unlocks the VWNFEC field and triggers an IOSF-SB Deassert_SMI message if VWNFEE is set to SMI. Setting of this bit is independent of the enable to generate a SMI/SERR (VWNFEE).
11:8	0h	RO/V	Virtual Wire Channel Non-Fatal Error Cause (VWNFEC) 4'h0: No error 4'h1: Device Response Code: NONFATAL_ERROR 4'h2 - 4'h5: Reserved 4'h6 - 4'hD: Reserved 4'hE: Device Virtual Wire: NON_FATAL_ERROR: 0->1 transition (1->0 transition on this VW is ignored) 4'hF: Reserved This field is updated after a Virtual Wire Channel transaction is completed if the VWNFES bit is not set.
7	0h	RO	Reserved 4 (RSVD4) Reserved
6:5	0h	RW	Virtual Wire Channel Fatal Error Reporting Enable (VWFEE) 2'b00: Disable Fatal Error Reporting 2'b01: Reserved 2'b10: Enable Fatal Error Reporting as SERR (IOSF-SB Do_SErr message) 2'b11: Enable Fatal Error Reporting as SMI (IOSF-SB Assert_SMI message) SERR enable is also qualified by PCCMD.SEE (Offset 04h) when PLTRST# is deasserted. SERR also sets PCSTS.SSE (Offset 06h) when PLTRST# is deasserted. SMI/SERR messages are not generated if the Host is in reset (PLTRST# asserted).
4	0h	RW/1C/V	Virtual Wire Channel Fatal Error Status (VWFES) This field is set by hardware if a Fatal Error condition is detected on the Virtual Wire Channel. Software must clear this bit by writing all 1s to it. 1'b0: No Fatal Error detected 1'b1: Fatal Error Type 2 detected (VWFEC has a non-zero value) Clearing this unlocks the VWFEC field and triggers an IOSF-SB Deassert_SMI message if VWFEE is set to SMI. Setting of this bit is independent of the enable to generate a SMI/SERR (VWFEE).
3:0	0h	RO/V	Virtual Wire Channel Fatal Error Cause (VWFEC) 4'h0: No error 4'h1 - 4'h7: Reserved 4'h8: Malformed Device Response Payload: VW Count > Max. VW Count [Type 2] 4'h9 - 4'hD: Reserved 4'hE: Device Virtual Wire: FATAL_ERROR 0->1 transition (1->0 transition on this VW is ignored) [Type 2] 4'hF: Reserved Note: This field is updated after a Virtual Wire Channel transaction is completed if the VWFES bit is not set.