31:24

0h

RW/V

threshold on counter increment (thresh)

Threshold is used, along with the invert bit, to compare against the incoming increment value that will be added to the counter.
For events that increment by more than 1 per cycle:

• if the threshold is set to a value greater than 1, the data register will accumulate instances in which the event increment is bigger than threshold
  
• if the threshold is set to 0, the data register will sum up the event without comparing to a threshold

23

0h

RW/V

invert comparison against threshold (invert)

0: Comparison will be - is event increment equal or bigger than threshold
1: Comparison is inverted - is event increment less than threshold
e.g. for a 64-entry queue, if SW wanted to know how many cycles the queue had fewer than 4 entries, SW should set the threshold to 4 and set the invert bit to 1.

22:21

0h

RO

Reserved

20

0h

RW/V

freeze on overflow (frz_​on_​ov)

When an overflow is detected from this register, a PMON overflow message is sent to the global control.
This bit will tell the global control whether it should assert the global freeze for all counters in the MC.

19

0h

RO

Reserved

18

0h

RW/V

edge detect (edge_​det)

when set to 1, rather than measuring the event in each cycle it's asserted, the corresponding counter will increment when a 0 to 1 transition (i.e. rising edge) is detected.

17

0h

RW/V

counter reset (rst)

when set to 1, the corresponding counter will be cleared to 0. this bit is self clearing

16:12

0h

RO

Reserved

11:8

0h

RW/V

channel mask (ch_​mask)

select which channel or sub channel is counted, or both.
In channel events bits [9:8] (lsb) mask the channel, in sub-channel events bits [11:8] mask [ch1-subch1, ch1-subch0, ch0-subch1, ch1-subch0].
To mask out a channel (or sub channel) set the according bit to 0x1.
Write/Read Occupancy Events (19,20,48,49) - can increment by more than 1 per cycle - should set mask to 0x0.
CKE off events (41,55) - can increment by more than 1 per cycle - CAN use the mask as described above.

7:0

0h

RW/V

event select (ev_​sel)

Select which of the available events should be recorded in the paired data register.
additional bits in the control register may also be required to select from the available events.
0x0 --> disable counter
0x1 --> count local clock ticks